參數(shù)資料
型號(hào): T89C51CC02UA-TDSIM
廠商: ATMEL CORP
元件分類: 微控制器/微處理器
英文描述: AB 9C 3#12 6#16 SKT RECP
中文描述: 8-BIT, FLASH, 40 MHz, MICROCONTROLLER, PDSO24
封裝: 0.300 INCH, PLASTIC, SOIC-24
文件頁數(shù): 90/170頁
文件大?。?/td> 1927K
代理商: T89C51CC02UA-TDSIM
90
A/T89C51CC01
4129L–CAN–08/05
Bit Timing and Baud Rate
FSM’s (Finite State Machine) of the CAN channel need to be synchronous to the time
quantum. So, the input clock for bit timing is the clock used into CAN channel FSM’s.
Field and segment abbreviations:
BRP: Baud Rate Prescaler.
TQ: Time Quantum (output of Baud Rate Prescaler).
SYNS: SYNchronization Segment is 1 TQ long.
PRS: PRopagation time Segment is programmable to be 1, 2, ..., 8 TQ long.
PHS1: PHase Segment 1 is programmable to be 1, 2, ..., 8 TQ long.
PHS2: PHase Segment 2 is programmable to be superior or equal to the
INFORMATION PROCESSING TIME and inferior or equal to TPHS1.
INFORMATION PROCESSING TIME is 2 TQ.
SJW: (Re) Synchronization Jump Width is programmable to be minimum of PHS1
and 4.
The total number of TQ in a bit time has to be programmed at least from 8 to 25.
Figure 47.
Sample And Transmission Point
The baud rate selection is made by Tbit calculation:
Tbit = Tsyns + Tprs + Tphs1 + Tphs2
1.
Tsyns = Tscl = (BRP[5..0]+ 1)/Fcan = 1TQ.
2.
Tprs = (1 to 8) * Tscl = (PRS[2..0]+ 1) * Tscl
3.
Tphs1 = (1 to 8) * Tscl = (PHS1[2..0]+ 1) * Tscl
4.
Tphs2 = (1 to 8) * Tscl = (PHS2[2..0]+ 1) * Tscl
Tphs2 = Max of (Tphs1 and 2TQ)
5.
Tsjw = (1 to 4) * Tscl = (SJW[1..0]+ 1) * Tscl
The total number of Tscl (Time Quanta) in a bit time must be comprised between
8 to
25
.
FCAN
CLOCK
Prescaler BRP
PRS 3-bit length
PHS1 3-bit length
PHS2 3-bit length
SJW 2-bit length
Bit Timing
System clock Tscl
Time Quantum
Sample point
Transmission point
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