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參數(shù)資料
| 型號： | T89C51RD2-RLTCM |
| 廠商： | ATMEL CORP |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 0 to 40 MHz Flash Programmable 8-bit Microcontroller |
| 中文描述： | 8-BIT, FLASH, 40 MHz, MICROCONTROLLER, PQFP44 |
| 封裝： | VQFP-44 |
| 文件頁數(shù)： | 16/104頁 |
| 文件大?。?/td> | 798K |
| 代理商： | T89C51RD2-RLTCM |
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16
T89C51RD2
4243G
–
8051
–
05/03
Instructions that use indirect addressing access the Upper 128 bytes of data RAM.
For example: MOV @R0, # data
where R0 contains 0A0H, accesses the data byte
at address 0A0H, rather than P2 (whose address is 0A0H).
The XRAM bytes can be accessed by indirect addressing, with EXTRAM bit cleared
and MOVX instructions. This part of memory which is physically located on-chip,
logically occupies the first bytes of external data memory. The bits XRS0 and XRS1
are used to hide a part of the available XRAM as explained in Table 7. This can be
useful if external peripherals are mapped at addresses already used by the internal
XRAM.
With EXTRAM = 0, the XRAM is indirectly addressed, using the MOVX instruction in
combination with any of the registers R0, R1 of the selected bank or DPTR.
An
access to XRAM will not affect ports P0, P2, P3.6 (WR) and P3.7 (RD)
.
For
example, with EXTRAM = 0, MOVX @R0, # data
where R0 contains 0A0H,
accesses the XRAM at address 0A0H rather than external memory. An access to
external data memory locations higher than the accessible size of the XRAM will be
performed with the MOVX DPTR instructions in the same way as in the standard
80C51, so with P0 and P2 as data/address busses, and P3.6 and P3.7 as write and
read timing signals. Accesses to XRAM above 0FFH can only be done thanks to the
use of DPTR.
With EXTRAM = 1, MOVX @Ri and MOVX @DPTR will be similar to the standard
80C51. MOVX @ Ri will provide an eight-bit address multiplexed with data on Port0
and any output port pins can be used to output higher order address bits. This is to
provide the external paging capability. MOVX @DPTR will generate a sixteen-bit
address. Port2 outputs the high-order eight address bits (the contents of DPH) while
Port0 multiplexes the low-order eight address bits (DPL) with data. MOVX @ Ri and
MOVX @DPTR will generate either read or write signals on P3.6 (WR) and P3.7
(RD).
The stack pointer (SP) may be located anywhere in the 256 bytes RAM (lower and
upper RAM) internal data memory. The stack may not be located in the XRAM.
The M0 bit allows to stretch the XRAM timings; if M0 is set, the read and write pulses
are extended from 6 to 30 clock periods. This is useful to access external slow
peripherals.
相關PDF資料 |
PDF描述 |
|---|---|
| T89C51RD2-RLTIL | 0 to 40 MHz Flash Programmable 8-bit Microcontroller |
| T89C51RD2-RLTIM | 0 to 40 MHz Flash Programmable 8-bit Microcontroller |
| T89C51RD2-RLVCL | 0 to 40 MHz Flash Programmable 8-bit Microcontroller |
| T89C51RD2-RLVCM | 0 to 40 MHz Flash Programmable 8-bit Microcontroller |
| T89C51RD2-RLVIL | 0 to 40 MHz Flash Programmable 8-bit Microcontroller |
相關代理商/技術參數(shù) |
參數(shù)描述 |
|---|---|
| T89C51RD2-RLTC-M | 制造商:ATMEL 制造商全稱:ATMEL Corporation 功能描述:0 to 40MHz Flash Programmable 8-bit Microcontroller |
| T89C51RD2-RLTIL | 制造商:ATMEL 制造商全稱:ATMEL Corporation 功能描述:0 to 40 MHz Flash Programmable 8-bit Microcontroller |
| T89C51RD2-RLTI-L | 制造商:ATMEL 制造商全稱:ATMEL Corporation 功能描述:0 to 40MHz Flash Programmable 8-bit Microcontroller |
| T89C51RD2-RLTIM | 制造商:ATMEL 制造商全稱:ATMEL Corporation 功能描述:0 to 40 MHz Flash Programmable 8-bit Microcontroller |
| T89C51RD2-RLTI-M | 制造商:ATMEL 制造商全稱:ATMEL Corporation 功能描述:0 to 40MHz Flash Programmable 8-bit Microcontroller |
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