參數(shù)資料
型號(hào): T89C51RD2-RLTIL
廠商: ATMEL CORP
元件分類: 微控制器/微處理器
英文描述: 0 to 40 MHz Flash Programmable 8-bit Microcontroller
中文描述: 8-BIT, FLASH, 25 MHz, MICROCONTROLLER, PQFP44
封裝: VQFP-44
文件頁數(shù): 49/104頁
文件大?。?/td> 798K
代理商: T89C51RD2-RLTIL
49
T89C51RD2
4243G
8051
05/03
Reduced EMI Mode
The ALE signal is used to demultiplex address and data buses on port 0 when used with
external program or data memory. Nevertheless, during internal code execution, ALE
signal is still generated. In order to reduce EMI, ALE signal can be disabled by setting
AO bit.
The AO bit is located in AUXR register at bit location 0. As soon as AO is set, ALE is no
longer output but remains active during MOVX and MOVC instructions and external
fetches. During ALE disabling, ALE pin is weakly pulled high.
Table 31.
AUXR Register
AUXR - Auxiliary Register (8Eh)
7
6
5
4
Reset Value = XX0X 1000b
Not bit addressable
3
2
1
0
-
-
M0
-
XRS1
XRS0
EXTRAM
AO
Bit
Number
Bit
Mnemonic
Description
7
-
Reserved
The value read from this bit is indeterminate. Do not set this bit.
6
-
Reserved
The value read from this bit is indeterminate. Do not set this bit.
5
M0
M0 bit: Pulse length in clock period
Stretch MOVX control: the RD/ and the WR/ pulse length is increased
according to the value of M0. see table 6
4
-
Reserved
The value read from this bit is indeterminate. Do not set this bit.
3
XRS1
XRS1 bit
XRAM size: Accessible size of the XRAM. See Table 6.
2
XRS0
XRS0 bit
XRAM size: Accessible size of the XRAM. Table 6.
1
EXTRAM
EXTRAM bit
See Table 6.
0
AO
ALE Output bit
Clear to restore ALE operation during internal fetches.
Set to disable ALE operation during internal fetches.
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