參數(shù)資料
型號: T89C51RD2-SMSIL
廠商: ATMEL CORP
元件分類: 微控制器/微處理器
英文描述: 0 to 40 MHz Flash Programmable 8-bit Microcontroller
中文描述: 8-BIT, FLASH, 25 MHz, MICROCONTROLLER, PQCC68
封裝: PLASTIC, LCC-68
文件頁數(shù): 43/104頁
文件大?。?/td> 798K
代理商: T89C51RD2-SMSIL
43
T89C51RD2
4243G
8051
05/03
Table 26.
Minimum Reset Capacitor Value for a 50 k
Pull-down Resistor
(1)
Note:
These values assume V
DD
starts from 0V to the nominal value. If the time between 2
on/off sequences is too fast, the power-supply de-coupling capacitors may not be fully
discharged, leading to a bad reset sequence.
Warm Reset
To achieve a valid reset, the reset signal must be maintained for at least 2 machine
cycles (24 oscillator clock periods) while the oscillator is running. The number of clock
periods is mode independent (X2 or X1).
Watchdog Reset
As detailed in Section
Watchdog Timer
, the WDT generates a 96-clock period pulse
on the RST pin. In order to properly propagate this pulse to the rest of the application in
case of external capacitor or power-supply supervisor circuit, a 1 k
resistor must be
added as shown Figure 18.
Figure 18.
Reset Circuitry for WDT Reset-out Usage
Oscillator
Start-Up Time
VDD Rise Time
1 ms
10 ms
100 ms
5 ms
820 nF
1.2 μF
12 μF
20 ms
2.7 μF
3.9 μF
12 μF
R
R
RST
VSS
To CPU Core
and Peripherals
VDD
+
P
VDD
From WDT
Reset Source
VSS
VDD
RST
1K
To Other
On-board
Circuitry
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