參數(shù)資料
型號: TAS3004PFB
廠商: TEXAS INSTRUMENTS INC
元件分類: 消費家電
英文描述: SPECIALTY CONSUMER CIRCUIT, PQFP48
封裝: GREEN, PLASTIC, TQFP-48
文件頁數(shù): 43/84頁
文件大?。?/td> 671K
代理商: TAS3004PFB
7–3
Once the download is complete, the fast load bit must be cleared by writing a 0 into bit 7 of the main control register
(MCR). This puts the TAS3004 device into normal mode.
7.2.5
Codec Reset
During initialization, the output of the CODEC is disabled. Throughout reset and initialization, the output of the DAC
is muted to prevent extraneous noise being sent to the system output.
Data from the ADC and other internal processing is purged so that when reset/initialization is complete, only valid
inputs are sent to the system output.
7.3
Power-Down Mode
The TAS3004 device has an asynchronous power-down mode. In the power-down mode, the internal control
registers and equalization programming of the device are stored in the device.
To enter power-down mode:
Assert the power-down control signal (1)
Set the serial audio input clocks to 0
The TAS3004 device goes into power-down mode.
To exit the power-down mode:
Assert RESET (logic 0)
Restart the serial audio clocks
Wait for a delay of 1.0 ms (to allow the PLL to lock)
Negate the power-down control signal (logic 0)
Negate RESET (logic 1)
The device then returns to the state it was in before power down (resumes normal operation).
7.3.1
Power-Down Timing Sequence
PWR_DN
Power-Down Mode
RESET
MCLK
SCLK
LRCLK
SDATA
1 ms
Normal Operation
Figure 7–2. Power-Down Timing Sequence
In power-down mode, the TAS3004 device consumes typically less than 1 mA.
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