- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄98158 > TAS3103DBT (TEXAS INSTRUMENTS INC) SPECIALTY CONSUMER CIRCUIT, PDSO38 PDF資料下載
參數(shù)資料
| 型號(hào)： | TAS3103DBT |
| 廠商： | TEXAS INSTRUMENTS INC |
| 元件分類： | 消費(fèi)家電 |
| 英文描述： | SPECIALTY CONSUMER CIRCUIT, PDSO38 |
| 封裝： | GREEN, PLASTIC, TSSOP-38 |
| 文件頁(yè)數(shù)： | 24/148頁(yè) |
| 文件大?。?/td> | 1247K |
| 代理商： | TAS3103DBT |
第1頁(yè)第2頁(yè)第3頁(yè)第4頁(yè)第5頁(yè)第6頁(yè)第7頁(yè)第8頁(yè)第9頁(yè)第10頁(yè)第11頁(yè)第12頁(yè)第13頁(yè)第14頁(yè)第15頁(yè)第16頁(yè)第17頁(yè)第18頁(yè)第19頁(yè)第20頁(yè)第21頁(yè)第22頁(yè)第23頁(yè)當(dāng)前第24頁(yè)第25頁(yè)第26頁(yè)第27頁(yè)第28頁(yè)第29頁(yè)第30頁(yè)第31頁(yè)第32頁(yè)第33頁(yè)第34頁(yè)第35頁(yè)第36頁(yè)第37頁(yè)第38頁(yè)第39頁(yè)第40頁(yè)第41頁(yè)第42頁(yè)第43頁(yè)第44頁(yè)第45頁(yè)第46頁(yè)第47頁(yè)第48頁(yè)第49頁(yè)第50頁(yè)第51頁(yè)第52頁(yè)第53頁(yè)第54頁(yè)第55頁(yè)第56頁(yè)第57頁(yè)第58頁(yè)第59頁(yè)第60頁(yè)第61頁(yè)第62頁(yè)第63頁(yè)第64頁(yè)第65頁(yè)第66頁(yè)第67頁(yè)第68頁(yè)第69頁(yè)第70頁(yè)第71頁(yè)第72頁(yè)第73頁(yè)第74頁(yè)第75頁(yè)第76頁(yè)第77頁(yè)第78頁(yè)第79頁(yè)第80頁(yè)第81頁(yè)第82頁(yè)第83頁(yè)第84頁(yè)第85頁(yè)第86頁(yè)第87頁(yè)第88頁(yè)第89頁(yè)第90頁(yè)第91頁(yè)第92頁(yè)第93頁(yè)第94頁(yè)第95頁(yè)第96頁(yè)第97頁(yè)第98頁(yè)第99頁(yè)第100頁(yè)第101頁(yè)第102頁(yè)第103頁(yè)第104頁(yè)第105頁(yè)第106頁(yè)第107頁(yè)第108頁(yè)第109頁(yè)第110頁(yè)第111頁(yè)第112頁(yè)第113頁(yè)第114頁(yè)第115頁(yè)第116頁(yè)第117頁(yè)第118頁(yè)第119頁(yè)第120頁(yè)第121頁(yè)第122頁(yè)第123頁(yè)第124頁(yè)第125頁(yè)第126頁(yè)第127頁(yè)第128頁(yè)第129頁(yè)第130頁(yè)第131頁(yè)第132頁(yè)第133頁(yè)第134頁(yè)第135頁(yè)第136頁(yè)第137頁(yè)第138頁(yè)第139頁(yè)第140頁(yè)第141頁(yè)第142頁(yè)第143頁(yè)第144頁(yè)第145頁(yè)第146頁(yè)第147頁(yè)第148頁(yè)
15
1.5
Ordering Information
TA
PLASTIC
38-PIN TSSOP
(DBT)
0
°C to 70°C
TAS3103DBT
40
°C to 85°C
TAS3103IDBT
1.6
Terminal Functions
TERMINAL
DESCRIPTION
PULLUP/
(2)
NAME
NO.
I/O
TYPE(1)
DESCRIPTION
PULLUP/
DOWN(2)
A_VDDS (3.3 V)
7
PWR
The PWR pin is used to input 3.3-V power to the DPLL and clock oscillator.
This pin can be connected to the same power source used to drive the DVSS
power pin. To achieve low DPLL jitter, this pin should be bypassed to AVSS
with a 0.01-
F capacitor (low ESR preferable).
None
AVDD_BYPASS_CAP
6
PWR
AVDD_BYPASS_CAP is a pinout of the internally regulated 1.8-VDC power
used by the DPLL and crystal oscillator. This pin should be connected to pin 8
with a 0.01-
F capacitor (low ESR preferable). This pin must not be used to
power external devices.
None
AVSS
8
PWR
AVSS is the ground reference for the internal DPLL and oscillator circuitry.
This pin needs to reference the same ground as DVSS power pin. To achieve
low DPLL jitter, ground noise at this pin must be minimized. The availability of
the AVSS pin allows a designer to use optimizing techniques such as star
ground connections, separate ground planes, or other quiet ground
distribution techniques to achieve a quiet ground reference at this pin.
None
CS0
24
I
D
CS0 is the LSB of a 2-bit code used to generate part of an I2C device address
that makes it possible to address four TAS3103 ICs on the same bus without
additional chip select logic. The pulldowns on the inputs select 00 as a default
when neither pin is connected.
Pulldown
CS1
25
I
D
CS1 is the MSB of a 2-bit code used to generate part of an I2C device address
that makes it possible to address four TAS3103 ICs on the same bus without
additional chip select logic.
Pulldown
DVDD_BYPASS_CAP
29
PWR
DVDD_BYPASS_CAP is a pin-out of the internally regulated 1.8-V power
used by all internal digital logic. This pin must not be used to power external
devices. A low ESR capacitor of at least 470 nF should be placed as close to
the device as possible between this pin and pin 28.
None
DVSS
28
PWR
DVSS is the digital ground pin.
None
GPIO0
18
I/O
D
GPIO0 is a general-purpose I/O, controlled by the internal microprocessor
through I2C commands. When in the I2C master mode, GPIO0 serves as a
volume up command for CH1/CH2.
Pullup
GPIO1
19
I/O
D
GPIO1 is a general-purpose I/O, controlled by the internal microprocessor
through I2C commands. When in the I2C master mode, GPIO1 serves as a
volume down command for CH1/CH2.
Pullup
GPIO2
20
I/O
D
GPIO2 is a general-purpose I/O, controlled by the internal microprocessor
through I2C commands. When in the I2C master mode, GPIO2 serves as a
volume up command for CH3.
Pullup
GPIO3
21
I/O
D
GPIO3 is a general-purpose I/O, controlled by the internal microprocessor
through I2C commands. When in the I2C master mode, GPIO3 serves as a
volume down command for CH3.
Pullup
I2CM_S
27
I
D
I2CM_S is a non-latched input that determines whether the TAS3103 acts as
an I2C master or slave. Logic high, or no connection, sets the TAS3103 as an
I2C master device. A logic low sets the TAS3103 as an I2C slave device. As a
master I2C device, the TAS3103 I2C port must have access to an external
EEPROM for input.
Pullup
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| TAS3103IDBT | SPECIALTY CONSUMER CIRCUIT, PDSO38 |
| TAS3103DBTRG4 | SPECIALTY CONSUMER CIRCUIT, PDSO38 |
| TAS3103DBTR | SPECIALTY CONSUMER CIRCUIT, PDSO38 |
| TAS3103IDBTRG4 | SPECIALTY CONSUMER CIRCUIT, PDSO38 |
| TAS3103IDBTR | SPECIALTY CONSUMER CIRCUIT, PDSO38 |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| TAS3103DBTG4 | 功能描述:音頻 DSP Digital Audio Processor RoHS:否 制造商:Texas Instruments 工作電源電壓: 電源電流: 工作溫度范圍: 安裝風(fēng)格: 封裝 / 箱體: 封裝:Tube |
| TAS3103DBTR | 功能描述:音頻 DSP Digital Audio Processor RoHS:否 制造商:Texas Instruments 工作電源電壓: 電源電流: 工作溫度范圍: 安裝風(fēng)格: 封裝 / 箱體: 封裝:Tube |
| TAS3103DBTRG4 | 功能描述:音頻 DSP Digital Audio Processor RoHS:否 制造商:Texas Instruments 工作電源電壓: 電源電流: 工作溫度范圍: 安裝風(fēng)格: 封裝 / 箱體: 封裝:Tube |
| TAS3103EVM | 功能描述:音頻 DSP TAS3103 Eval Mod RoHS:否 制造商:Texas Instruments 工作電源電壓: 電源電流: 工作溫度范圍: 安裝風(fēng)格: 封裝 / 箱體: 封裝:Tube |
| TAS3103IDBT | 功能描述:音頻 DSP Digital Audio Processor RoHS:否 制造商:Texas Instruments 工作電源電壓: 電源電流: 工作溫度范圍: 安裝風(fēng)格: 封裝 / 箱體: 封裝:Tube |
發(fā)布緊急采購(gòu)，3分鐘左右您將得到回復(fù)。