參數(shù)資料
型號： TAS5706PAPRG4
廠商： TEXAS INSTRUMENTS INC
元件分類： 音頻／視頻放大
英文描述： 20.6 W, 2 CHANNEL, AUDIO AMPLIFIER, PQFP64
封裝： 10 X 10 MM, GREEN, PLASTIC, HTQFP-64
文件頁數(shù)： 35/70頁
文件大?。?/td> 1169K
代理商： TAS5706PAPRG4
SLOS550B – DECEMBER 2007 – REVISED DECEMBER 2010
www.ti.com
I
2C SERIAL CONTROL COMMAND CHARACTERISTICS
The DAP has two groups of I2C commands. One set is commands that are designed specifically to be operated
while audio is streaming and that have built-in mechanisms to prevent noise, clicks, and pops. The other set
does not have this built-in protection.
Commands that are designed to be adjusted while audio is streaming:
Master volume
Master mute
Individual channel volume
Individual channel mute
Commands that are normally issued as part of initialization:
Serial data interface format
De-emphasis
Sample-rate conversion
Input multiplexer
Output multiplexer
Biquads
Down mix
Channel delay
Enable/disable dc blocking
Hard/soft unmute from clock error
Enable/disable headphone outputs
Start-up sequence for correct device operation
This sequence must be followed to ensure proper operation.
1. Hold ALL logic inputs low. Power up AVDD/DVDD and wait for the inputs to settle in the allowed range.
AVDD and DVDD must be ramped up together. The voltage difference between AVDD and DVDD during the
ramp must be restricted to no more than 0.4 V.
2. Drive PDN = 1, MUTE = 1, and drive other logic inputs to the desired state.
3. Provide a stable MCLK, LRCLK, and SCLK (clock errors must be avoided during the initialization sequence) .
4. After completing step 3, wait 100 ms, then drive RESET = 1, and wait 13.5 ms after RESET goes high.
5. Trim the internal oscillator (write 0x00 to register 0x1B).
6. Ramp up PVDD to at least 8 V while ensuring that it remains below 6 V for at least 100 s after AVDD/DVDD
reaches 3 V. Then wait at least another 10 s.
7. Wait 50 ms while the part acquires lock.
8. Configure the DAP via I2C, e.g.:
–
Downmix control (0x21)
–
Biquads (0x23–0x24 and 0x29–0x38)
–
DRC parameters and controls (0x3A–0x46)
–
Bank select (0x50)
NOTE: User may not issue any I2C reads or writes to the above registers after this step is complete.
9. Configure remaining I2C registers, e.g.:
–
Shutdown group
–
De-emphasis
–
Input multiplexers
–
Output multiplexers
–
Channel delays
–
DC blocking
–
Hard/soft unmute from clock error
–
Serial data interface format
40
Copyright 2007–2010, Texas Instruments Incorporated
Product Folder Link(s): TAS5706
相關(guān)PDF資料
PDF描述
TAS5706PAPR 20.6 W, 2 CHANNEL, AUDIO AMPLIFIER, PQFP64
TAS5706PAP 20.6 W, 2 CHANNEL, AUDIO AMPLIFIER, PQFP64
TAS5706PAPG4 20.6 W, 2 CHANNEL, AUDIO AMPLIFIER, PQFP64
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