參數(shù)資料
型號: TB62201AFG
廠商: Toshiba Corporation
英文描述: Dual-Stepping Motor Driver IC for OA Equipment Using PWM Chopper Type
中文描述: 雙辦公自動(dòng)化設(shè)備步進(jìn)馬達(dá)驅(qū)動(dòng)IC用PWM斬波型
文件頁數(shù): 14/89頁
文件大小: 1423K
代理商: TB62201AFG
TB62201AFG
2005-04-04
14
10. Conditions on Overwriting MIXED DECAY TIMING Table
If the following conditions are satisfied, the table can be overwritten.
When
RESET
= H (when
RESET
= L, the shift register is cleared, thus data cannot be input)
When an internal reset is not triggered.
1) When the temperature is such that TSD is not triggered (or not reset by TSD).
2) Under a condition where ISD is not triggered (or not reset by ISD).
3) Both V
DD
and V
M
are within the operating voltage.
Note 1: While the output transistors are operating, do not rewrite the values in the mixed decay timing
table.
Note 2: The SETUP pins is pulled down in the IC by 10-k
resistor
When not using the pin, connect it to GND. Otherwise, malfunction may occur.
11. Data Input Signal at Setting Mixed Decay Timing Table
Data No.
Name
Function
Initial Value
15 MSB
Current Mode 3
Selects Slow or Mixed Decay mode
1 : MIXED DECAY MODE
14
DECAY MODE 3-2
Sets decay 3 ratio (decay 3 raito)
1
13
DECAY MODE 3-1
1
12
DECAY MODE 3-0
1 : 100% : FAST DECAY MODE
11
Current Mode 2
Selects Slow or Mixed Decay mode
1 : MIXED DECAY MODE
10
DECAY MODE 2-2
Sets decay 2 ratio
1
9
DECAY MODE 2-1
0
8
DECAY MODE 2-0
1 : 75% MIXED DECAY
7
Current Mode 1
Selects Slow or Mixed Decay mode
1 : MIXED DECAY MODE
6
DECAY MODE 1-2
Sets decay 1 ratio
0
5
DECAY MODE 1-1
1
4
DECAY MODE 1-0
0 : 37.5% MIXED DECAY
3
Current Mode 0
Selects Slow or Mixed Decay mode
0 : SLOW DECAY MODE
2
DECAY MODE 0-2
Sets decay 0 ratio
0
1
DECAY MODE 0-1
0
0 LSB
DECAY MODE 0-0
0 (SLOW DECAY MODE)
Note 1: Input order of serial data
When setting decay timing, first input H to the SETUP pin, the same as for ordinary data, then
input data from LSB (DATA 0) to MSB (DATA 15).
When power is first turned on, the initial values in the table above are set as defaults.
Once latched, data are not cleared except by VDDR (power-on and power-off reset).
Next, after the mode changes to SETUP, the data are retained until mixed decay timing data are input and
latched.
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