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參數(shù)資料
| 型號： | TB62709F |
| 廠商： | Toshiba Corporation |
| 英文描述： | 7-SEGMENT DRIVERS WITH BUILT-IN DECODERS (COMMON ANODE CAPABILITY, MAXIMUM 4-DIGIT CONTROL) |
| 中文描述： | 7段建造司機了解碼器（共陽極容量，最大4位數(shù)管制） |
| 文件頁數(shù)： | 5/24頁 |
| 文件大?。?/td> | 636K |
| 代理商： | TB62709F |
588
120 Broadway Menands, New York 12204
Toll Free:
(800) 98-4LEDS
Fax: (518) 432-7454
marktech
optoelectronics
TOSHIBA Bi-CMOS Integrated
Circuit Silicon Monolithic
TB62709N/F
For up-to-date product info visit our web site at www.marktechopto.com All specifications subject to change.
Recommended Operating Conditions:
CHARACTERISTICS
SYMBOL
CONDITION
MIN.
TYP.
MAX.
UNIT
Output Stage
Supply Voltage
VCC
4.0
—
6.0
V
Digit 0~3 Output Current
IDIG
VOUT=3.0V
—
—
-320
mA
Out a~DP Output Current
ISEG
VCE=0.7V
—
—
40
mA
Logic
Supply Voltage
VDD
4.5
—
5.5
V
High Level Input Current
IIH
Data-In,
Load&Clock,VIN=VDD
—
—
1
μA
Low Level Input Current
IIL
Data-In, Load&Clock,VIN=0V
—
—
-1
μA
High Level Input Voltage
VIH
0.7
VDD
—
—
V
Low Level Input Voltage
VIL
—
—
0.3
VDD
V
Switching Condition
Data Hold Time (D-IN Clock)
tDHO
30
—
—
ns
Data Setup Time (D-IN Clock)
tDST
50
—
—
ns
Propagation Delay (Clock D-Out)
tPDSO
CL=10pf
50
—
—
ns
High Level Pulse Width Of Clock
tCLKH
30
—
—
ns
Low Level Pulse Width Of Clock
tCLKL
30
—
—
ns
Pulse Width Of Load
twLD
150
—
—
ns
Setup Time (Clock-Load)
tCKLD
100
—
—
ns
Setup Time (Load-Clock)
tLDCLK
100
—
—
ns
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