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鍙冩暩(sh霉)璩囨枡
鍨嬭櫉锛� TC1301B-FHAVUA
寤犲晢锛� Microchip Technology
鏂囦欢闋佹暩(sh霉)锛� 10/36闋�
鏂囦欢澶�?銆�?/td> 0K
鎻忚堪锛� IC REG LDO 2.8V/2.6V/2.63V 8MSOP
妯欐簴鍖呰锛� 100
绌�(w臎n)澹撳櫒鎷撴挷绲�(ji茅)妲�(g貌u)锛� 姝�锛屽浐瀹氬紡
杓稿嚭闆诲锛� 2.8V锛�2.6V锛�2.63V锛堝京(f霉)浣嶏級
杓稿叆闆诲锛� 2.7 V ~ 6 V
闆诲 - 澹撻檷锛堟婧栵級锛� 0.104V @ 300mA锛�0.15V @ 150mA
绌�(w臎n)澹撳櫒鏁�(sh霉)閲忥細 2
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宸ヤ綔婧害锛� -40°C ~ 125°C
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灏佽/澶栨锛� 8-TSSOP锛�8-MSOP锛�0.118"锛�3.00mm 瀵級
渚涙噳(y墨ng)鍟嗚ō(sh猫)鍌欏皝瑁濓細 8-MSOP
鍖呰锛� 绠′欢
18 Analog & Interface Product Selector Guide Summer 2012
lI
near
:
Zero-
d
rift
o
perational
a
mplifi
er
s
P
ar
t#
#
per
P
ackage
g
BWP
Iq
m
ax
(m
a
)
V
os
m
ax
(V)
V
os
d
rift
m
ax
(V/掳
c
)
o
perating
Voltage
(V)
Temperature r
ange
(掳
c
)
Features
P
ackages
MCP6V11
1
80
kHz
0.011
8
0.05
1.6
to
5.5
40
to
+125
Rail-to-Rail
Input/Output
5-pin
SOT-23,
5-pin
SC-70,
5-pin
SOT-23
(S,
U)
,
5-pin
SOT-70
(U)
MCP6V31
1
300
kHz
0.034
8
0.05
1.6
to
5.5
40
to
+125
Rail-to-Rail
Input/Output
5-pin
SOT-23,
5-pin
SC-70,
5-pin
SOT-23
(S,
U)
,
5-pin
SOT-70
(U)
TC7652
1
0.4
MHz
3
5
0.05
5
to
16
0
to
+70
Single
and
Split
Supply,
Low
Noise
8-pin
PDIP,
14-pin
PDIP
MCP6V01
1
1.3
MHz
0.4
2
0.05
1.8
to
5.5
40
to
+125
Rail-to-Rail
Input/Output
8-pin
SOIC,
8-pin
2脳3
TDFN
MCP6V02
2
1.3
MHz
0.4
2
0.05
1.8
to
5.5
40
to
+125
Rail-to-Rail
Input/Output
8-pin
SOIC,
8-pin
4脳4
DFN
MCP6V03
1
1.3
MHz
0.4
2
0.05
1.8
to
5.5
40
to
+125
Rail-to-Rail
Input/Output,
Chip
select
8-pin
SOIC,
8-pin
2脳3
TDFN
MCP6V06
1
1.3
MHz
0.4
3
0.05
1.8
to
5.5
40
to
+125
Rail-to-Rail
Input/Output
8-pin
SOIC,
8-pin
2脳3
TDFN
MCP6V07
2
1.3
MHz
0.4
3
0.05
1.8
to
5.5
40
to
+125
Rail-to-Rail
Input/Output
8-pin
SOIC,
8-pin
4脳4
DFN
MCP6V08
1
1.3
MHz
0.4
3
0.05
1.8
to
5.5
40
to
+125
Rail-to-Rail
Input/Output,
Chip
select
8-pin
SOIC,
8-pin
2脳3
TDFN
TC913A/B
2
1.5
MHz
1.1
15
0.15/0.30
7
to
16
0
to
+70
Single
and
Split
Supply
8-pin
PDIP,
8-pin
SOIC
TC7650
1
2
MHz
3.5
5
0.05
4.5
to
16
0
to
+70
Single
and
Split
Supply
8-pin
PDIP,
14-pin
PDIP
MCP6V26
1
2
MHz
0.8
2
0.05
2.3
to
5.5
40
to
+125
Rail-to-Rail
Input/Output
8-pin
SOIC,
8-pin
MSOP,
8-pin
2脳3
TDFN
MCP6V27
2
MHz
0.8
2
0.05
2.3
to
5.5
40
to
+125
Rail-to-Rail
Input/Output
8-pin
SOIC,
8-pin
MSOP,
8-pin
4脳4
DFN
MCP6V28
1
2
MHz
0.8
2
0.05
2.3
to
5.5
40
to
+125
Rail-to-Rail
Input/Output,
Chip
select
8-pin
SOIC,
8-pin
MSOP,
8-pin
2脳3
TDFN
lI
near
:
Programmable
g
ain
a
mplifi
er
s(P
ga
)
P
ar
t#
c
hannels
3dB
BW
(mh
z)
Iq
T
yp.
(m
a
)
V
os
(V)
o
perating
Voltage
(V)
Temperature r
ange
(掳
c
)
Features
P
ackages
MCP6S21
1
2
to
12
1.1
275
2.5
to
5.5
40
to
+85
SPI,
8
Gain
steps,
Software
shutdown
8-pin
PDIP,
8-pin
SOIC,
8-pin
MSOP
MCP6S22
2
to
12
1.1
275
2.5
to
5.5
40
to
+85
SPI,
8
Gain
steps,
Software
shutdown
8-pin
PDIP,
8-pin
SOIC,
8-pin
MSOP
MCP6S26
6
2
to
12
1.1
275
2.5
to
5.5
40
to
+85
SPI,
8
Gain
steps,
Software
shutdown
14-pin
PDIP,
14-pin
SOIC,
14-pin
TSSOP
MCP6S28
8
2
to
12
1.1
275
2.5
to
5.5
40
to
+85
SPI,
8
Gain
steps,
Software
shutdown
16-pin
PDIP,
16-pin
SOIC
MCP6S91
1
to
18
1.0
4000
2.5
to
5.5
40
to
+125
SPI,
8
Gain
steps,
Software
shutdown,
V
ref
8-pin
PDIP,
8-pin
SOIC,
8-pin
MSOP
MCP6S92
2
1
to
18
1.0
4000
2.5
to
5.5
40
to
+125
SPI,
8
Gain
steps,
Software
shutdown
8-pin
PDIP,
8-pin
SOIC,
8-pin
MSOP
MCP6S93
2
1
to
18
1.0
4000
2.5
to
5.5
40
to
+125
SPI,
8
Gain
steps,
Software
shutdown,
V
ref
,SO
10-pin
MSOP
lI
near
:
s
electable
g
ain
a
mplifi
er
s(
sga
)
P
ar
t#
c
hannels
3dB
BW
(k
h
z)
Iq
(
a
)
V
os
(mV)
o
perating
Voltage
(V)
Temperature r
ange
(掳
c
)
g
ain
s
teps
(V/V)
Features
P
ackages
MCP6G01
1
900
110
4.5
1.8
to
5.5
40
to
+125
1,
10,
50
Tri-State
control
pin
8-pin
SOIC,
8-pin
MSOP,
5-pin
SOT-23
(S,
R,
U)
MCP6G02
2
900
110
4.5
1.8
to
5.5
40
to
+125
1,
10,
50
Tri-State
control
pin
8-pin
SOIC,
8-pin
MSOP
MCP6G03
1
900
110
4.5
1.8
to
5.5
40
to
+125
1,
10,
50
Tri-State
control
pin,
Chip
select
8-pin
SOIC,
8-pin
MSOP
MCP6G04
4
900
110
4.5
1.8
to
5.5
40
to
+125
1,
10,
50
Tri-State
control
pin
14-pin
SOIC,
14-pin
TSSOP
lI
near
:
Instr
umentation
a
mplifi
er
s
Par
t#
#P
er
Package
g
BWP
Iq
m
ax
(m
a
)
m
ax
V
os
(V)
V
os
d
rift
m
ax
(V/掳
c)
o
perating
Voltage
(V)
Temperature
r
ange
(掳
c)
Features
Packages
MCP6N11
1
500
kHz
1.1
350
2.7
1.8
to
5.5
40
to
+125
Rail-to-Rail
Input/Output,
mCal
Technology
8-pin
SOIC,
8-pin
2脳3
TDFN
legend:
S
=
Standard
Pinout;
R
=
Re
ver
se
Pinout;
U
=
Alter
native
Pinout
鐩搁棞(gu膩n)PDF璩囨枡
PDF鎻忚堪
UMA1V220MDD CAP ALUM 22UF 35V 20% RADIAL
MAX6322HPUK29C-T IC MPU/RESET CIRC 2.93V SOT23-5
ESA35DTAI CONN EDGECARD 70POS R/A .125 SLD
MAX6321HPUK46CY-T IC MPU/RESET CIRC 4.63V SOT23-5
MAX6321HPUK25CY-T IC MPU/RESET CIRC 2.50V SOT23-5
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鍙冩暩(sh霉)鎻忚堪
TC1301B-FHAVUATR 鍔熻兘鎻忚堪:浣庡宸┅(w臎n)澹撳櫒 - LDO Dual CMOS LDO 300mA & 150mA RoHS:鍚� 鍒堕€犲晢:Texas Instruments 鏈€澶ц几鍏ラ浕澹�:36 V 杓稿嚭闆诲:1.4 V to 20.5 V 鍥炲嫊闆诲锛堟渶澶у€硷級:307 mV 杓稿嚭闆绘祦:1 A 璨犺級瑾�(di脿o)绡€(ji茅):0.3 % 杓稿嚭绔暩(sh霉)閲�: 杓稿嚭椤炲瀷:Fixed 鏈€澶у伐浣滄韩搴�:+ 125 C 瀹夎棰�(f膿ng)鏍�:SMD/SMT 灏佽 / 绠遍珨:VQFN-20
TC1301B-GDDVMF 鍔熻兘鎻忚堪:浣庡宸┅(w臎n)澹撳櫒 - LDO Dual CMOS LDO 300mA & 150mA RoHS:鍚� 鍒堕€犲晢:Texas Instruments 鏈€澶ц几鍏ラ浕澹�:36 V 杓稿嚭闆诲:1.4 V to 20.5 V 鍥炲嫊闆诲锛堟渶澶у€硷級:307 mV 杓稿嚭闆绘祦:1 A 璨犺級瑾�(di脿o)绡€(ji茅):0.3 % 杓稿嚭绔暩(sh霉)閲�: 杓稿嚭椤炲瀷:Fixed 鏈€澶у伐浣滄韩搴�:+ 125 C 瀹夎棰�(f膿ng)鏍�:SMD/SMT 灏佽 / 绠遍珨:VQFN-20
TC1301B-GDDVMFTR 鍔熻兘鎻忚堪:浣庡宸┅(w臎n)澹撳櫒 - LDO Dual CMOS LDO 300mA & 150mA RoHS:鍚� 鍒堕€犲晢:Texas Instruments 鏈€澶ц几鍏ラ浕澹�:36 V 杓稿嚭闆诲:1.4 V to 20.5 V 鍥炲嫊闆诲锛堟渶澶у€硷級:307 mV 杓稿嚭闆绘祦:1 A 璨犺級瑾�(di脿o)绡€(ji茅):0.3 % 杓稿嚭绔暩(sh霉)閲�: 杓稿嚭椤炲瀷:Fixed 鏈€澶у伐浣滄韩搴�:+ 125 C 瀹夎棰�(f膿ng)鏍�:SMD/SMT 灏佽 / 绠遍珨:VQFN-20
TC1301B-GDDVUA 鍔熻兘鎻忚堪:浣庡宸┅(w臎n)澹撳櫒 - LDO Dual CMOS LDO 300mA & 150mA RoHS:鍚� 鍒堕€犲晢:Texas Instruments 鏈€澶ц几鍏ラ浕澹�:36 V 杓稿嚭闆诲:1.4 V to 20.5 V 鍥炲嫊闆诲锛堟渶澶у€硷級:307 mV 杓稿嚭闆绘祦:1 A 璨犺級瑾�(di脿o)绡€(ji茅):0.3 % 杓稿嚭绔暩(sh霉)閲�: 杓稿嚭椤炲瀷:Fixed 鏈€澶у伐浣滄韩搴�:+ 125 C 瀹夎棰�(f膿ng)鏍�:SMD/SMT 灏佽 / 绠遍珨:VQFN-20
TC1301B-GDDVUATR 鍔熻兘鎻忚堪:浣庡宸┅(w臎n)澹撳櫒 - LDO Dual CMOS LDO 300mA & 150mA RoHS:鍚� 鍒堕€犲晢:Texas Instruments 鏈€澶ц几鍏ラ浕澹�:36 V 杓稿嚭闆诲:1.4 V to 20.5 V 鍥炲嫊闆诲锛堟渶澶у€硷級:307 mV 杓稿嚭闆绘祦:1 A 璨犺級瑾�(di脿o)绡€(ji茅):0.3 % 杓稿嚭绔暩(sh霉)閲�: 杓稿嚭椤炲瀷:Fixed 鏈€澶у伐浣滄韩搴�:+ 125 C 瀹夎棰�(f膿ng)鏍�:SMD/SMT 灏佽 / 绠遍珨:VQFN-20