參數(shù)資料
型號： TC530
廠商： TelCom Semiconductor, Inc.
英文描述： 5V PRECISION DATA ACQUISITION SUBSYSTEMS
中文描述： 5V的高精度數(shù)據(jù)采集的子系統(tǒng)
文件頁數(shù)： 10/15頁
文件大小： 158K
代理商： TC530
3-56
TELCOM SEMICONDUCTOR, INC.
5V PRECISION DATA ACQUISITION
SUBSYSTEMS
TC530
TC534
20
V
INMAX
R
INT
(M
) =
where: V
INMAX
= Maximum Input Voltage (full count
voltage)
R
INT
= Integrating Resistor (in M
)
For loop stability, R
INT
should be
≥
50k
.
(2)
Select Reference
(C
REF
)
and Auto Zero
(C
AZ
)
Capacitors
C
REF
and C
AZ
must be low leakage capacitors (such
as polypropylene). The slower the conversion rate,
the larger the value C
REF
must be. Recommended
capacitors for C
REF
and C
AZ
are shown in Table 1.
Larger values for C
AZ
and C
REF
may also be used to
limit roll-over errors.
Table 1. C
REF
and C
AZ
Selection
Conversions Typical Value of Suggested *
Per Second
C
REF
, C
AZ
(
μ
F)
>7
0.1
2 to 7
0.22
2 or less
0.47
*WIMA Corp. listing on the last page of this data sheet.
Part Number
WIMA MK12 .1/63/20
WIMA MK12 .22/63/20
WIMA MK12 .47/63/20
3.
Calculate Integrating Capacitor
(C
INT
)
The integrating capacitor must be selected to maxi-
mize integrator output voltage swing. The integrator
output voltage swing is defined as the absolute value
of V
DD
(or V
SS
) less 0.9V (i.e. |V
DD
– 0.9V| or |V
SS
+
0.9V|). Using the 20
μ
A buffer maximum output
current, the value of the integrating capacitor is
calculated using the following equation:
(t
INT
)(20)
C
INT
(
μ
F) =
(V
S
– 0.9)
= Integration Period
= Applied Supply Voltage
= Integrator Capacitor Value (in
μ
F)
where: t
INT
V
S
C
INT
It is critical that the integrating capacitor have a very
low dielectric absorption. PPS capacitors are an
example of one such chemistry. Table 2 summa-
rizes various capacitors suitable for C
INT
.
Value
Suggested Part Number*
0.1
0.22
0.33
0.47
WIMA MK12 .1/63/20
WIMA MK12 .22/63/20
WIMA MK12 .33/63/20
WIMA MK12 .47/63/20
*WIMA Corp. listing on the last page of this data sheet.
4.
Calculate V
REF
The reference deintegration voltage is calculated
using:
V
REF
(in Volts) =
(V
S
– 0.9)(C
INT
)(R
INT
)
2(t
INT
)
Serial Port
Communication with the TC530/534 is accomplished
over a 3 wire serial port. Data is clocked into D
IN
on the rising
edge of D
CLK
and clocked out of D
OUT
on the falling edge of
D
CLK
. R/W must be HIGH to read converted data from the
serial port and LOW to write the LOAD VALUE to the TC530/
534.
Load Value Write Cycle (Figure 4)
Following the power-up reset pulse, the LOAD VALUE
(which sets the duration of AZ and INT) must next be
transmitted to the serial port. To accomplish this, the proces-
sor monitors the state of EOC (which is available as a
hardware output or at D
OUT
). R/W is taken low to initiate the
write cycle only when EOC is low (during the AZ phase).
(Failure to observe EOC low may cause an offset voltage to
be developed across C
INT
resulting in erroneous readings).
The 8 bit LOAD VALUE data on D
IN
is clocked in by D
CLK
.
The processor then terminates the write cycle by taking
R/W high. (Data is transferred from the serial input shift
register to the time base counter on the rising edge of R/W,
and data conversion is initiated).
Data Read Cycle (Figure 5)
Data is shifted out of the serial port in the following order:
End of Conversion (EOC), Overrange (OVR), Sign (SGN),
conversion data (MSB first). When R/W is high, the state of
the EOC bit can be polled by simply reading the state of
D
OUT
. This allows the processor to determine if new data is
available without connecting an additional wire to the EOC
output pin (this is especially useful in a polled environment).
Input Multiplexer (TC534 Only)
A 4 input, differential multiplexer is included in the
TC534. The states of channel address lines A0 and A1
determine which differential V
IN
pair is routed to the con-
Table 2. Recommend Capacitor for C
INT
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