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參數(shù)資料
| 型號： | TC54VN7202EZB |
| 元件分類： | 電源管理 |
| 英文描述： | 1-CHANNEL POWER SUPPLY SUPPORT CKT, PBCY3 |
| 封裝： | TO-92, 3 PIN |
| 文件頁數(shù)： | 12/16頁 |
| 文件大?。?/td> | 340K |
| 代理商： | TC54VN7202EZB |
2003 Microchip Technology Inc.
DS21434E-page 5
TC54
3.0
DETAILED DESCRIPTION
In normal steady-state operation when VIN > VDET-,
the output will be at a logic-high (see Figure 3-1). In
the case of the TC54VN, this is an open-drain condi-
tion. If and when the input falls below VDET -, the output
will pull down (Logic 0) to VSS. Generally, VOUT can
pull down to within 0.5V of VSS at rated output current
and input voltage. (See Section 1.0, “Electrical
Characteristics”).
The output (VOUT) will stay valid until the input voltage
falls below the minimum operating voltage (VINMIN) of
0.7V. Below this minimum operating voltage, the output
is undefined. During power-up (or anytime VIN has
fallen below VINMIN), VOUT will remain undefined until
VIN rises above VINMIN. Once this occurs, the output
will become valid. VOUT will be in its active-low state,
while VINMIN < VIN < VDET+ (therefore, VDET+ = VDET-
+ VHYST). If and when the input rises above VDET+, the
output will assume its inactive state (high for TC54VC,
open-drain for TC54VN).
FIGURE 3-1:
Timing Diagram.
VIN
Detect Voltage VDET -
Minimum Operating
Voltage
VHYST
VDET+
Output Voltage
Release Voltage
or RESET Voltage
Ground Level
VOUT
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| TC54VNXX01EZB | 功能描述:監(jiān)控電路 _ RoHS:否 制造商:STMicroelectronics 監(jiān)測電壓數(shù): 監(jiān)測電壓: 欠電壓閾值: 過電壓閾值: 輸出類型:Active Low, Open Drain 人工復位:Resettable 監(jiān)視器:No Watchdog 電池備用開關:No Backup 上電復位延遲（典型值）:10 s 電源電壓-最大:5.5 V 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:UDFN-6 封裝:Reel |
| TC54VNXX02ECB713 | 功能描述:監(jiān)控電路 _ RoHS:否 制造商:STMicroelectronics 監(jiān)測電壓數(shù): 監(jiān)測電壓: 欠電壓閾值: 過電壓閾值: 輸出類型:Active Low, Open Drain 人工復位:Resettable 監(jiān)視器:No Watchdog 電池備用開關:No Backup 上電復位延遲（典型值）:10 s 電源電壓-最大:5.5 V 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:UDFN-6 封裝:Reel |
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