參數(shù)資料
型號(hào)： TC7116ACLW
元件分類： ADC
英文描述： 1-CH 22-BIT DUAL-SLOPE ADC, PARALLEL ACCESS, PQCC44
封裝： PLASTIC, LCC-44
文件頁(yè)數(shù)： 23/24頁(yè)
文件大?。?/td> 410K
代理商： TC7116ACLW
TC7116/A/TC7117/A
DS21457C-page 8
2006 Microchip Technology Inc.
3.0
DETAILED DESCRIPTION
(All Pin Designations Refer to 40-Pin PDIP.)
3.1
Analog Section
Figure 3-1 shows the block diagram of the analog sec-
tion for the TC7116/TC7116A and TC7117/TC7117A.
Each measurement cycle is divided into three phases:
(1) Auto-Zero (AZ), (2) Signal Integrate (INT), and
(3) Reference Integrate (REF), or De-integrate (DE).
3.1.1
AUTO-ZERO PHASE
High and low inputs are disconnected from the pins and
internally shorted to analog common. The reference
capacitor is charged to the reference voltage. A feed-
back loop is closed around the system to charge the
auto-zero capacitor (CAZ) to compensate for offset volt-
ages in the buffer amplifier, integrator, and comparator.
Since the comparator is included in the loop, AZ
accuracy is limited only by system noise. The offset
referred to the input is less than 10
μV.
3.1.2
SIGNAL INTEGRATE PHASE
The auto-zero loop is opened, the internal short is
removed, and the internal high and low inputs are
connected to the external pins. The converter then inte-
grates the differential voltages between VIN+ and VIN-
for a fixed time. This differential voltage can be within a
wide Common mode range: 1V of either supply. How-
ever, if the input signal has no return with respect to the
converter power supply, VIN- can be tied to analog
common to establish the correct Common mode
voltage. At the end of this phase, the polarity of the
integrated signal is determined.
FIGURE 3-1:
Analog Section of TC7116/TC7116A and TC7117/TC7117A
3.1.3
REFERENCE INTEGRATE PHASE
The final phase is reference integrate, or de-integrate.
Input low is internally connected to analog common
and input high is connected across the previously
charged reference capacitor. Circuitry within the chip
ensures that the capacitor will be connected with the
correct polarity to cause the integrator output to return
to zero. The time required for the output to return to
zero is proportional to the input signal. The digital
reading displayed is:
EQUATION 3-1:
3.1.4
REFERENCE
The positive reference voltage (VREF+) is referred to
analog common.
TC7116
TC7116A
TC7117
TC7117A
CREF
CREF+
CREF-
RINT
V+
CAZ
Auto-Zero
VINT
28
35
29
27
33
36
34
10
μA
31
AZ
INT
AZ & DE (±)
32
30
INT
26
Integrator
V+ -3V
Comparator
To
Digital
Section
DE (+)
DE
(–)
DE
(+)
DE (–)
V+
AZ
Analog
Common
VIN+
VIN-
VBUFF
CINT
VREF+
Low
Temp.
Drift
Zener
VREF
V-
+
–
+
–
+
–
1000 =
VIN
VREF
相關(guān)PDF資料
PDF描述
TC7116ACKW 1-CH 22-BIT DUAL-SLOPE ADC, PARALLEL ACCESS, PQFP44
TC7117ACKWTR 1-CH 22-BIT DUAL-SLOPE ADC, PARALLEL ACCESS, PQFP44
TC7117ACLWTR 1-CH 22-BIT DUAL-SLOPE ADC, PARALLEL ACCESS, PQCC44
TC7117ACLW 1-CH 22-BIT DUAL-SLOPE ADC, PARALLEL ACCESS, PQCC44
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
TC7116ACLW713 功能描述:LCD 驅(qū)動(dòng)器 w/Hold RoHS:否 制造商:Maxim Integrated 數(shù)位數(shù)量:4.5 片段數(shù)量:30 最大時(shí)鐘頻率:19 KHz 工作電源電壓:3 V to 3.6 V 最大工作溫度:+ 85 C 最小工作溫度:- 20 C 封裝 / 箱體:PDIP-40 封裝:Tube
TC7116ACPL 功能描述:LCD 驅(qū)動(dòng)器 w/Hold RoHS:否 制造商:Maxim Integrated 數(shù)位數(shù)量:4.5 片段數(shù)量:30 最大時(shí)鐘頻率:19 KHz 工作電源電壓:3 V to 3.6 V 最大工作溫度:+ 85 C 最小工作溫度:- 20 C 封裝 / 箱體:PDIP-40 封裝:Tube
TC7116AIJL 功能描述:LCD 驅(qū)動(dòng)器 3-1/2 Digit A/D w/ Hold RoHS:否 制造商:Maxim Integrated 數(shù)位數(shù)量:4.5 片段數(shù)量:30 最大時(shí)鐘頻率:19 KHz 工作電源電壓:3 V to 3.6 V 最大工作溫度:+ 85 C 最小工作溫度:- 20 C 封裝 / 箱體:PDIP-40 封裝:Tube
TC7116CKW 功能描述:LCD 驅(qū)動(dòng)器 w/Hold RoHS:否 制造商:Maxim Integrated 數(shù)位數(shù)量:4.5 片段數(shù)量:30 最大時(shí)鐘頻率:19 KHz 工作電源電壓:3 V to 3.6 V 最大工作溫度:+ 85 C 最小工作溫度:- 20 C 封裝 / 箱體:PDIP-40 封裝:Tube
TC7116CKW713 功能描述:LCD 驅(qū)動(dòng)器 w/Hold RoHS:否 制造商:Maxim Integrated 數(shù)位數(shù)量:4.5 片段數(shù)量:30 最大時(shí)鐘頻率:19 KHz 工作電源電壓:3 V to 3.6 V 最大工作溫度:+ 85 C 最小工作溫度:- 20 C 封裝 / 箱體:PDIP-40 封裝:Tube
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