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參數資料
| 型號： | TC7116CKWRT |
| 元件分類： | ADC |
| 英文描述： | 1-CH DUAL-SLOPE ADC, PQFP44 |
| 封裝： | PLASTIC, QFP-44 |
| 文件頁數： | 2/18頁 |
| 文件大?。?/td> | 160K |
| 代理商： | TC7116CKWRT |
10
3-1/2 Digit Analog-To-Digital
Convereters with Hold
TC7116
TC7116A
TC7117
TC7117A
TC7116/A/7117/A-7 9/17/99
2001 Microchip Technology Inc.
DS21457A
TC7117
TC7117A
THOUSANDS
HUNDREDS
TENS
UNITS
4
39
OSC
V
DIGITAL
GND
TEST
35
TO SWITCH DRIVERS
FROM COMPARATOR OUTPUT
CLOCK
7-SEGMENT
DECODE
7-SEGMENT
DECODE
7-SEGMENT
DECODE
40
38
2
OSC3
OSC1
÷
HLDR
CONTROL LOGIC
TYPICAL SEGMENT OUTPUT
DIGITAL GROUND
TO
SEGMENT
V
+
0.5mA
8mA
37
21
500
V
+
1
LATCH
~70k
+
System Timing
The clocking method used for the TC7116/TC7116A
and TC7117/TC7117A is shown in Figure 9. Three clocking
methods may be used:
(1) An external oscillator connected to pin 40.
(2) A crystal between pins 39 and 40.
(3) An RC network using all three pins.
The oscillator frequency is
before it clocks the
decade counters. It is then further divided to form the three
convert-cycle phases: signal integrate (1000 counts), refer-
ence deintegrate (0 to 2000 counts), and auto-zero (1000 to
3000 counts). For signals less than full scale, auto-zero gets
the unused portion of reference deintegrate. This makes a
complete measure cycle of 4000 (16,000 clock pulses)
independent of input voltage. For 3 readings per second, an
oscillator frequency of 48kHz would be used.
To achieve maximum rejection of 60-Hz pickup, the
signal-integrate cycle should be a multiple of 60Hz. Oscilla-
tor frequencies of 240kHz, 120kHz, 80kHz, 60kHz, 48kHz,
40kHz, etc. should be selected. For 50Hz rejection, oscilla-
tor frequencies of 200kHz, 100kHz, 66-2/3kHz, 50kHz,
40kHz, etc. would be suitable. Note that 40kHz (2.5 readings
per second) will reject both 50Hz and 60Hz.
HOLD Reading Input
When HLDR is at a logic HIGH the latch will not be
updated. Analog-to-digital conversions will continue but will
not be updated until HLDR is returned to LOW. To continu-
ously update the display, connect to test (TC7116/TC7116A)
or ground (TC7117/TC7117A), or disconnect. This input is
CMOS compatible with 70k
typical resistance to TEST
(TC7116/TC7116A) or ground (TC7117/TC7117A).
Figure 9. TC7117/TC7117A Digital Section
相關PDF資料 |
PDF描述 |
|---|---|
| TC7116CLWRT | 1-CH DUAL-SLOPE ADC, PQCC44 |
| TC7117ACLWRT | 1-CH DUAL-SLOPE ADC, PQCC44 |
| TC7117ACKWRT | 1-CH DUAL-SLOPE ADC, PQFP44 |
| TC7117CKWRT | 1-CH DUAL-SLOPE ADC, PQFP44 |
| TC7116ACLWRT | 1-CH DUAL-SLOPE ADC, PQCC44 |
相關代理商/技術參數 |
參數描述 |
|---|---|
| TC7116CLW | 功能描述:LCD 驅動器 w/Hold RoHS:否 制造商:Maxim Integrated 數位數量:4.5 片段數量:30 最大時鐘頻率:19 KHz 工作電源電壓:3 V to 3.6 V 最大工作溫度:+ 85 C 最小工作溫度:- 20 C 封裝 / 箱體:PDIP-40 封裝:Tube |
| TC7116CLW713 | 功能描述:LCD 驅動器 w/Hold RoHS:否 制造商:Maxim Integrated 數位數量:4.5 片段數量:30 最大時鐘頻率:19 KHz 工作電源電壓:3 V to 3.6 V 最大工作溫度:+ 85 C 最小工作溫度:- 20 C 封裝 / 箱體:PDIP-40 封裝:Tube |
| TC7116CPL | 功能描述:LCD 驅動器 w/Hold RoHS:否 制造商:Maxim Integrated 數位數量:4.5 片段數量:30 最大時鐘頻率:19 KHz 工作電源電壓:3 V to 3.6 V 最大工作溫度:+ 85 C 最小工作溫度:- 20 C 封裝 / 箱體:PDIP-40 封裝:Tube |
| TC7116CPL | 制造商:Microchip Technology Inc 功能描述:Analog/Digital Converter IC Number of Bi |
| TC7116IJL | 功能描述:LCD 驅動器 3-1/2 Digit A/D w/ Hold RoHS:否 制造商:Maxim Integrated 數位數量:4.5 片段數量:30 最大時鐘頻率:19 KHz 工作電源電壓:3 V to 3.6 V 最大工作溫度:+ 85 C 最小工作溫度:- 20 C 封裝 / 箱體:PDIP-40 封裝:Tube |
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