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參數資料
| 型號： | TC7126CKW713 |
| 元件分類： | ADC |
| 英文描述： | 1-CH DUAL-SLOPE ADC, PQFP44 |
| 封裝： | PLASTIC, QFP-44 |
| 文件頁數： | 22/22頁 |
| 文件大小： | 553K |
| 代理商： | TC7126CKW713 |
2002 Microchip Technology Inc.
DS21458B-page 9
TC7126/A
3.0
DETAILED DESCRIPTION
(All Pin Designations Refer to 40-Pin PDIP.)
3.1
Dual Slope Conversion Principles
The TC7126A is a dual slope, integrating analog-to-
digital converter. An understanding of the dual slope
conversion technique will aid in following the detailed
TC7126/A operation theory.
The conventional dual slope converter measurement
cycle has two distinct phases:
Input Signal Integration
Reference Voltage Integration (De-integration)
The input signal being converted is integrated for a fixed
time period (TSI). Time is measured by counting clock
pulses. An opposite polarity constant reference voltage
is then integrated until the integrator output voltage
returns to zero. The reference integration time is directly
proportional to the input signal (TRI) (seeFigure3-1).
FIGURE 3-1:
BASIC DUAL SLOPE
CONVERTER
In a simple dual slope converter, a complete conver-
sion requires the integrator output to “ramp-up” and
“ramp-down.”
A simple mathematical equation relates the input sig-
nal, reference voltage and integration time:
EQUATION 3-1:
For a constant VIN:
EQUATION 3-2:
The dual slope converter accuracy is unrelated to the
integrating resistor and capacitor values, as long as
they are stable during a measurement cycle. Noise
immunity is an inherent benefit. Noise spikes are inte-
grated or averaged to zero during integration periods.
Integrating ADCs are immune to the large conversion
errors that plague successive approximation converters
in high noise environments. Interfering signals with fre-
quency components at multiples of the averaging period
will be attenuated. Integrating ADCs commonly operate
with the signal integration period set to a multiple of the
50Hz/60Hz power line period (see Figure 3-2).
FIGURE 3-2:
NORMAL MODE
REJECTION OF DUAL
SLOPE CONVERTER
+
–
REF
Voltage
Analog
Input
Signal
+
–
Display
Switch
Driver
Control
Logic
Integrator
Output
Clock
Counter
Polarity Control
Phase
Control
VIN ≈ VREF
VIN ≈ 1.2 VREF
Variable
Reference
Integrate
Time
Fixed
Signal
Integrate
Time
Integrator
Comparator
Where:
VR = Reference voltage
TSI = Signal integration time (fixed)
TRI = Reference voltage integration time (variable)
1
RC
TSI
0
VIN(t)dt =
∫
VRTRI
RC
V
IN
V
R
T
RI
T
SI
-------
=
30
20
10
0
Normal
Mode
Rejection
(dB)
0.1/t
1/t
10/t
Input Frequency
t = Measurement Period
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相關代理商/技術參數 |
參數描述 |
|---|---|
| TC7126CLW | 功能描述:LCD 驅動器 Low Power RoHS:否 制造商:Maxim Integrated 數位數量:4.5 片段數量:30 最大時鐘頻率:19 KHz 工作電源電壓:3 V to 3.6 V 最大工作溫度:+ 85 C 最小工作溫度:- 20 C 封裝 / 箱體:PDIP-40 封裝:Tube |
| TC7126CLW713 | 功能描述:LCD 驅動器 Low Power RoHS:否 制造商:Maxim Integrated 數位數量:4.5 片段數量:30 最大時鐘頻率:19 KHz 工作電源電壓:3 V to 3.6 V 最大工作溫度:+ 85 C 最小工作溫度:- 20 C 封裝 / 箱體:PDIP-40 封裝:Tube |
| TC7126CPL | 功能描述:LCD 驅動器 Low Power RoHS:否 制造商:Maxim Integrated 數位數量:4.5 片段數量:30 最大時鐘頻率:19 KHz 工作電源電壓:3 V to 3.6 V 最大工作溫度:+ 85 C 最小工作溫度:- 20 C 封裝 / 箱體:PDIP-40 封裝:Tube |
| TC7126CPL | 制造商:Microchip Technology Inc 功能描述:3.5 DIGIT ADC CMOS 7126 DIP40 制造商:Microchip Technology Inc 功能描述:3.5 DIGIT ADC, CMOS, 7126, DIP40 制造商:Microchip Technology Inc 功能描述:3.5 DIGIT ADC, CMOS, 7126, DIP40; Resolution (Bits):3.5bit; Supply Voltage Max:15V; Supply Current:55A; Digital IC Case Style:DIP; No. of Pins:40; Input Channel Type:Differential; Data Interface:Parallel; Operating Temperature ;RoHS Compliant: Yes |
| TC7126IPL | 功能描述:LCD 驅動器 Low Power RoHS:否 制造商:Maxim Integrated 數位數量:4.5 片段數量:30 最大時鐘頻率:19 KHz 工作電源電壓:3 V to 3.6 V 最大工作溫度:+ 85 C 最小工作溫度:- 20 C 封裝 / 箱體:PDIP-40 封裝:Tube |
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