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參數(shù)資料
| 型號(hào)： | TC7126RCPL |
| 廠商： | Microchip Technology Inc. |
| 元件分類： | 顯示驅(qū)動(dòng)器 |
| 英文描述： | 3-1/2 Digit Analog-to-Digital Converters |
| 中文描述： | 3-1/2數(shù)字模擬數(shù)字轉(zhuǎn)換器 |
| 文件頁(yè)數(shù)： | 5/13頁(yè) |
| 文件大小： | 198K |
| 代理商： | TC7126RCPL |
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TELCOM SEMICONDUCTOR, INC.
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3-1/2 DIGIT
ANALOG-TO-DIGITAL CONVERTERS
TC7126
TC7126A
PIN DESCRIPTION
(Cont.)
40-Pin PDIP
Pin Number
Normal
(Reverse)
Name
C
+
REF
Description
34
(7)
A 0.1
μ
F capacitor is used in most applications. If a large common-mode voltage
exists (for example, the V
IN–
pin is not at analog common), and a 200 mV scale is
used, a 1
μ
F capacitor is recommended and will hold the roll-over error to 0.5
count.
See pin 36.
The analog input required to generate a full-scale output (1999 counts). Place 100
mV between pins 35 and 36 for 199.9 mV full scale. Place 1V between pins 35
and 36 for 2V full scale. See paragraph on reference voltage.
Lamp test. When pulled HIGH (to V
+
), all segments will be turned ON and the
display should read –1888. It may also be used as a negative supply for exter-
nally-generated decimal points. See paragraph under test for additional informa-
tion.
See pin 40.
See pin 40.
Pins 40, 39 and 38 make up the oscillator section. For a 48 kHz clock (3 readings
39per second), connect pin 40 to the junction of a 180 k
resistor and a 50 pF
capacitor. The 180 k
resistor is tied to pin 39 and the 50 pF capacitor is tied to
pin 38.
35
(6)
(5)
V
–
V
+
REF
REF
36
(4)
TEST
37
38
40
(3)
(2)
(1)
OSC
3
OSC
2
OSC
1
Figure 1. Basic Dual-Slope Converter
where:
V
R
= Reference voltage
t
SI
= Signal integration time (fixed)
t
RI
= Reference voltage integration time (variable).
GENERAL THEORY OF OPERATION
(All Pin Designations Refer to the 40-Pin DIP)
Dual-Slope Conversion Principles
The TC7126A is a dual-slope, integrating analog-to-
digital converter. An understanding of the dual-slope con-
version technique will aid in following detailed TC7126A
operational theory.
The conventional dual-slope converter measurement
cycle has two distinct phases:
(1) Input signal integration
(2) Reference voltage integration (deintegration)
The input signal being converted is integrated for a
fixed time period (t
SI
), measured by counting clock pulses.
An opposite polarity constant reference voltage is then
integrated until the integrator output voltage returns to
zero. The reference integration time is directly proportional
to the input signal (t
RI
).
In a simple dual-slope converter, a complete conver-
sion requires the integrator output to "ramp-up" and "ramp-
down."
A simple mathematical equation relates the input signal,
reference voltage, and integration time:
∫
0
+
–
REF
VOLTAGE
ANALOG
INPUT
SIGNAL
+
–
DISPLAY
SWITCH
DRIVER
CONTROL
LOGIC
I
O
CLOCK
COUNTER
POLARITY CONTROL
PHASE
CONTROL
VIN
VIN
VFULL SCALE
1.2 VFULL SCALE
VARIABLE
REFERENCE
INTEGRATE
TIME
FIXED
SIGNAL
INTEGRATE
TIME
INTEGRATOR
COMPARATOR
'
'
1
V
R
t
RI
RC
RC
V
IN
(t) dt =
,
t
SI
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