參數(shù)資料
型號: TC74A23F
廠商: Toshiba Corporation
英文描述: RELAY SWITCH; N RELAY SWITCH; FREQUENCY RANGE: DC-4 GHz; SWICH TYPE: SPDT; FEATURE: FAILSAFE; ACTUATING VOLTAGE: 12; VSWR: 1.20:1 @ 4 GHz
中文描述: 東芝的CMOS數(shù)字集成電路硅單片
文件頁數(shù): 3/20頁
文件大?。?/td> 221K
代理商: TC74A23F
TC94A23F
2002-02-06
11
Pin
Number
Symbol
Pin Name
Function and Operation
Remarks
69
RFGC
Control signal output pin for adjusting RF
amplitude.
Outputs three-level PWM signal
(PWM carrier
= 88.2 kHz).
70
TEBC
Tracking balance control signal output pin.
Outputs three-level PWM signal
(PWM carrier
= 88.2 kHz).
71
FMO
Focus equalizer output pin.
Outputs three-level PWM signal
(PWM carrier
= 88.2 kHz).
72
DMO
Disc equalizer output pin.
Outputs three-level PWM signal
(PWM carrier
= 88.2 kHz for DSP block).
73
2VREF
Analog reference voltage power supply pin
(2
VREF)
74
SEL
CD processor control
input/output
APC circuit on/off signal output pin.
At laser on, high impedance at UHS
= High; H
level output at UHS
= High.
77
XVSS
80
XVDD
Power supply pins for CD crystal oscillator.
To control the CD processor power supply
and the controller power supply individually,
connect the MVDD and MVSS pins to the
power supply lines used by the VDD and VSS
pins.
78
XI
79
XO
CD processor crystal
oscillator pins
CD crystal oscillator input/output pins.
Connect a 16.9344 MHz crystal oscillator. The
clock is used as the CD system clock and
controller system clock.
After system reset, this clock is supplied as
the controller system clock and starts the
CPU.
The crystal oscillator can be halted by
program. If the 4.5 MHz or 75 kHz oscillator is
selected as the controller system clock, the
oscillator is halted by program when the CD
processor is off.
During execution of the CKSTP instruction,
oscillation halts.
(Note)
When switching the controller
system clock from the controller
oscillator to the CD crystal oscillator,
make sure that the CD crystal
oscillator is in stable state.
P2VREF
VREF
Rout3
VDD
XVDD
XVSS
XO
Rout1
RfXT1
XI
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