TC835
DS21478B-page 6
2002 Microchip Technology Inc.
2.0
PIN DESCRIPTIONS
The descriptions of the pins are listed in Table 2-1.
TABLE 2-1:
PIN FUNCTION TABLE
Pin Number
28-Pin PDIP
Symbol
Description
1
V-
Negative power supply input.
2
REF IN
External reference input.
3
ANALOG COMMON
Reference point for REF IN.
4
INT OUT
Integrator output. Integrator capacitor connection.
5
AZ IN
Auto zero input. Auto zero capacitor connection.
6
BUFF OUT
Analog input buffer output. Integrator resistor connection.
7CREF-
Reference capacitor input. Reference capacitor negative connection.
8CREF+
Reference capacitor input. Reference capacitor positive connection.
9
-INPUT
Analog input. Analog input negative connection.
10
+INPUT
Analog input. Analog input positive connection.
11
V+
Positive power supply input.
12
D5
Digit drive output. Most Significant Digit (MSD)
13
B1
Binary Coded Decimal (BCD) output. Least Significant Bit (LSB)
14
B2
BCD output.
15
B4
BCD output.
16
B8
BCD output. Most Significant Bit (MSB)
17
D4
Digit drive output.
18
D3
Digit drive output.
19
D2
Digit drive output.
20
D1
Digit drive output. Least Significant Digit (LSD)
21
BUSY
Busy output. At the beginning of the signal-integration phase, BUSY goes High and
remains High until the first clock pulse after the integrator zero crossing.
22
CLOCK IN
Clock input. Conversion clock connection.
23
POLARITY
Polarity output. A positive input is indicated by a logic High output. The polarity output is
valid at the beginning of the reference integrate phase and remains valid until determined
during the next conversion.
24
DGND
Digital logic reference input.
25
RUN/HOLD
Run / Hold input. When at a logic High, conversions are performed continuously. A logic
Low holds the current data as long as the Low condition exists.
26
STROBE
Strobe output. The STROBE output pulses low in the center of the digit drive outputs.
27
OVERRANGE
Over range output. A logic High indicates that the analog input exceeds the full scale input
range.
28
UNDERRANGE
Under range output. A logic High indicates that the analog input is less than 9% of the full
scale input range.