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參數(shù)資料
| 型號： | TC850ILW |
| 廠商： | Microchip Technology |
| 文件頁數(shù)： | 25/26頁 |
| 文件大小： | 0K |
| 描述： | IC ADC 15BIT FAST 44PLCC |
| 標(biāo)準(zhǔn)包裝： | 27 |
| 位數(shù)： | 15 |
| 采樣率（每秒）： | 40 |
| 數(shù)據(jù)接口： | 并聯(lián) |
| 轉(zhuǎn)換器數(shù)目： | 1 |
| 電壓電源： | 雙 ± |
| 工作溫度： | -25°C ~ 85°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 44-LCC（J 形引線） |
| 供應(yīng)商設(shè)備封裝： | 44-PLCC |
| 包裝： | 管件 |
| 輸入數(shù)目和類型： | 1 個差分，單極 |
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TC850
DS21479C-page 8
2006 Microchip Technology Inc.
3.0
DETAILED DESCRIPTION
The TC850 is a multiple-slope, integrating A/D con-
verter (ADC). The multiple-slope conversion process,
combined with chopper-stabilized amplifiers, results in
a significant increase in ADC speed, while maintaining
very high resolution and accuracy.
3.1
Dual-Slope Conversion Principles
The conventional dual-slope converter measurement
cycle (shown in Figure 3-1) has two distinct phases:
1.
Input signal integration
2.
Reference voltage integration (de-integration).
FIGURE 3-1:
Dual-Slope ADC Cycle
The input signal being converted is integrated for a
fixed time period, measured by counting clock pulses.
An opposite polarity constant reference voltage is then
de-integrated until the integrator output voltage returns
to zero. The reference integration time is directly
proportional to the input signal.
In a simple dual-slope converter, complete conversion
requires the integrator output to “ramp-up” and “ramp-
down.” Most dual-slope converters add a third phase,
auto-zero. During auto-zero, offset voltages of the input
buffer, integrator and comparator are nulled, thereby
eliminating the need for zero offset adjustments.
Dual-slope converter accuracy is unrelated to the inte-
grating resistor and capacitor values, as long as they
are stable during a measurement cycle. By converting
the unknown analog input voltage into an easily mea-
sured function of time, the dual-slope converter
reduces the need for expensive, precision passive
components.
Noise immunity is an inherent benefit of the integrating
conversion method. Noise spikes are integrated, or
averaged, to zero during the integration period. Inte-
grating ADCs are immune to the large conversion
errors
that
plague
successive
approximation
converters in high-noise environments.
A simple mathematical equation relates the input
signal, reference voltage and integration time:
EQUATION 3-1:
3.2
Multiple-Slope Conversion
Principles
One limitation of the dual-slope measurement tech-
nique is conversion speed. In a typical dual-slope
method, the auto-zero and integrate times are each
one-half of the de-integrate time. For a 15-bit conver-
sion, 214 +214 +215 (65,536) clock pulses are required
for auto-zero, integrate and de-integrate phases,
respectively. The large number of clock cycles
effectively limits the conversion rate to about 2.5
conversions per second, when a typical analog CMOS
fabrication process is used.
The TC850 uses a multiple-slope conversion technique
to increase conversion speed (Figure 3-2). This tech-
nique makes use of a two-slope de-integration phase
and permits 15-bit resolution up to 40 conversions per
second.
During the TC850’s de-integration phase, the integra-
tion capacitor is rapidly discharged to yield a
resolution of 9 bits. At this point, some charge will
remain on the capacitor. This remaining charge is then
slowly de-integrated, producing an additional 6 bits of
resolution. The result is 15 bits of resolution achieved
with only 29 +26 (512 + 64, or 576) clock pulses for
de-integration. A complete conversion cycle occupies
only 1280 clock pulses.
In order to generate “fast-slow” de-integration phases,
two voltage references are required. The primary refer-
ence (VREF1) is set to one-half of the full scale voltage
(typically VREF1 = 1.6384V, and VFS = 3.2768V). The
secondary voltage reference (VREF2) is set to VREF1/64
(typically 25.6 mV). To maintain 15-bit linearity, a
tolerance of 0.5% for VREF2 is recommended.
FIGURE 3-2:
“Fast Slow” Reference De-
Integration Cycle
Auto
Zero
0V
Integrator
Output
End of Conversion
Reference
De-integrate
Signal De-integrate
Time
1
RINTCINT∫
TINT
0
VIN(T)DT =
VREF TDEINT
RINTCINT
where:
VREF
= Reference voltage
TINT
= Signal integration time (fixed)
TDEINT = Reference voltage integration time
(variable).
Auto
Zero
0V
Integrator
Output
End of Conversion
"Slow" Reference De-integrate
(6-Bit Resolution)
"Fast" Reference
De-integrate
(9-Bit Resolution)
Signal Integrate
Time
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| TC850ILW713 | 功能描述:模數(shù)轉(zhuǎn)換器 - ADC 16 Bit Hi Speed A/D RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 結(jié)構(gòu):Sigma-Delta 轉(zhuǎn)換速率:125 SPs to 8 KSPs 分辨率:24 bit 輸入類型:Differential 信噪比:107 dB 接口類型:SPI 工作電源電壓:1.7 V to 3.6 V, 2.7 V to 5.25 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:VQFN-32 |
| TC8521AM | 制造商:TOSHIBA 制造商全稱:Toshiba Semiconductor 功能描述:REAL TIME CLOCK ケ |
| TC8521AP | 制造商:TOSHIBA 制造商全稱:Toshiba Semiconductor 功能描述:REAL TIME CLOCK ケ |
| TC8566AF | 制造商:TOSHIBA 制造商全稱:Toshiba Semiconductor 功能描述:FLOPPY DISK CONTROLLER |
| TC8569AF | 制造商:TOSHIBA 制造商全稱:Toshiba Semiconductor 功能描述:FLOPPY DISK CONTROLLER |
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