參數(shù)資料
型號(hào)： TC9028F
元件分類： 搖控器
英文描述： INFRARED, TRANSMITTER IC, PDSO20
封裝： 0.300 INCH, 1.27 MM PITCH, PLASTIC, SOP-20
文件頁(yè)數(shù)： 17/21頁(yè)
文件大?。?/td> 571K
代理商： TC9028F
TC9028P/F
2002-01-08
5
2.2
Memory bank register (MBR)
The memory bank register is a 4 bit write-only register. It holds the page specification (upper 4 bits of
the program counter) when a branch is made anywhere in program memory.
2.3
Stack register (STACK)
The stack is a 10 bit register. When the [CALLS a] instruction is executed, the stack register saves
the contents of the program counter (return address) before the program jumps to the processing
routine.
Only one level of subroutines can be used. When there are two calls, the first return address is
overwritten when the second return address is saved to the stack register.
When the program returns from the processing routine, execution of the [RET] instruction restores
the contents of the stack register to the program counter.
2.4
Data counter (DC)
When fixed data stored in the data table in program memory (ROM) are read, the data counter (DC)
are used to specify 4 bits of the address.
In addition to transferring data to the accumulator, the data counter is also equipped with increment
and decrement functions and can therefore be used as a general-purpose register.
Fixed data stored in the data table can be read using the table look-up instruction.
When the table look-up instruction is executed, the upper 6 bits of the ROM address are “101111” and
the lower 4 bits are the contents of the data counter (DC). These bits specify the last 16 bytes
(addresses 2F0~2FFH) of program memory for fixed data.
2.5
Program memory (ROM)
Program memory stores program and fixed data. The next instruction to be executed is read from the
address indicated by the program counter.
Physical program memory doesn’t exist in addresses 300~3FFH.
When this area is read on the program, 7FH ( [NOP] instruction) is read.
Figure 2.2 Program memory map
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