參數(shù)資料
型號(hào)： TC9205M-DS-R02
廠商： Electronic Theatre Controls, Inc.
元件分類： 圓形連接器
英文描述： Circular Connector; No. of Contacts:2; Series:; Body Material:Aluminum; Connector Shell Size:8; Circular Contact Gender:Socket; Circular Shell Style:Straight Plug; Insert Arrangement:8-2
中文描述： 5端口10/100/1000智能以太網(wǎng)交換機(jī)
文件頁(yè)數(shù)： 3/51頁(yè)
文件大?。?/td> 1661K
代理商： TC9205M-DS-R02
TC9205M
Preliminary Data Sheet
Table Of Contents
Features..............................................................................................................................................................1
General Description............................................................................................................................................1
Block Diagram.....................................................................................................................................................2
Table Of Contents...............................................................................................................................................3
Revision History..................................................................................................................................................4
Pins Placement...................................................................................................................................................5
1
Pin Listing (PBGA 292)...............................................................................................................................6
2
Ethernet Media Access Controller............................................................................................................15
2.1
Receive MAC..................................................................................................................... 15
2.2
Transmit MAC.................................................................................................................... 16
3
MAC Address Handling.............................................................................................................................17
4
Queue Management.................................................................................................................................17
5
Classes of Service....................................................................................................................................18
6
Flow Control..............................................................................................................................................20
7
Broadcast Throttling..................................................................................................................................22
8
Port Mirroring.............................................................................................................................................22
9
Physical Layer Configuration / Polling......................................................................................................23
10
EEPROM Interface...................................................................................................................................24
10.1
Reprogramming the EEPROM for reconfiguration ............................................................ 24
10.2
EEPROM Address Map ..................................................................................................... 25
10.3
Register Description........................................................................................................... 27
10.3.1
Validation Register................................................................................................ 27
10.3.2
Port [
X
] Configuration Register............................................................................. 29
10.3.3
Port [
X
] IFG Configuration Register ................................................................... 31
10.3.4
Flow Control Register ........................................................................................... 32
10.3.5
Backpressure Time Value Register....................................................................... 34
10.3.6
Flow Control Port Base Address Register ............................................................ 34
10.3.7
Reserved............................................................................................................... 34
10.3.8
Broadcast Configuration Register......................................................................... 35
10.3.9
IP Priority Mapping Register................................................................................. 36
10.3.10
VLAN Priority Mapping Register........................................................................... 37
10.3.11
CoS Bandwidth Register....................................................................................... 38
10.3.12
Reserved Register................................................................................................ 38
10.3.13
CoS Configuration Register.................................................................................. 39
10.3.14
Port Mirroring Register.......................................................................................... 40
10.3.15
General Configuration Register ............................................................................ 41
10.3.16
Port VLAN Enable Register .................................................................................. 42
10.3.17
VLAN [
Y
] Register................................................................................................. 43
10.4
Writing / Reading PHY management registers via EEPROM interface............................. 44
10.4.1
Data Write Register............................................................................................... 44
10.4.2
Physical Layer Device Address Register.............................................................. 44
10.4.3
Physical Layer’s Register Address Register......................................................... 45
10.4.4
IO Status Control Register.................................................................................... 45
10.4.5
Data Read Register .............................................................................................. 46
11
Timing Requirements................................................................................................................................47
11.1
GMII / MII Receive Timing Requirements.......................................................................... 47
11.2
GMII / MII Transmit Timing................................................................................................. 47
11.3
PHY Management (MDIO) Timing..................................................................................... 48
11.4
EEPROM Timing................................................................................................................ 49
12
Electrical Specifications ............................................................................................................................50
12.1
ABSOLUTE MAXIMUM RATINGS..................................................................................... 50
Confidential.
Copyright
2003, IC Plus Corp.
3/51
July 30, 2003
TC9205M-DS-R03
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