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參數(shù)資料
| 型號(hào)： | TC9470FN |
| 元件分類： | DAC |
| 英文描述： | SERIAL, PARALLEL, WORD INPUT LOADING, 1-BIT DAC, PDSO24 |
| 封裝： | 0.300 INCH, 0.65 MM PITCH, PLASTIC, SSOP-24 |
| 文件頁數(shù)： | 4/19頁 |
| 文件大?。?/td> | 377K |
| 代理商： | TC9470FN |
TC9470FN
2002-02-27
12
10.2 Serial Mode (
S
P/
= “L”: microcontroller setting mode)
It is possible to make the various settings with a microcontroller when in the serial mode.
Pins 18, 19 and 20 are used as the command input pins shown in the table below when in the serial
mode.
Table 7 Pin Names at the Serial Mode
Pin No.
Pin Name
Pin Description
18
LATCH
Data latch signal input pin
19
SHIFT
Shift clock signal input pin
20
ATT
Data input pin
The LATCH signals and ATT signals are loaded to the LSI internal shift registers on the SHIFT
signal rising edge. It is consequently necessary for the data input from the ATT pin on the shift signal
rising edge to be valid as indicated in the timing example in Figure 13. It is also necessary for the
LATCH pulse to rise at least 1.5 s after the final clock rising edge input from the SHIFT pin.
Operating the shift clock with LATCH low destabilizes the internal state, which may lead to
malfunctions, so it must therefore be set to the low level after loading D7 to the register.
The various control settings when in the serial mode are shown in the table below.
Ensure that all control bits are set when the power supply is turned on.
Table 8 Serial Mode Control Settings
Control Signals
Serial Input Data
MODE 1
MODE 2
MODE 3
D12
0
1
D11
AT11
0
1
D10
AT10
EMP
DBB1
D09
AT09
MONO
DBB2
D08
AT08
CHS
DBB3
D07
AT07
RLS
BMUTE
D06
AT06
EFS
TCA
D05
AT05
DOFF
TCR
D04
AT04
―
D03
AT03
―
D02
AT02
―
D01
AT01
―
D00
AT00
―
AT11 to AT00: Attenuation level setting
EMP: De-emphasis ON/OFF switch
MONO, CHS: Stereo/monaural switch
RLS: LRCK polarity switch
EFS: Dynamic circuit compression characteristics switch
DOFF: Dynamic circuit ON/OFF switch
DBB1, DBB2: Digtal bass boost mode setting
DBB3: DBB MEGA max setting
BMUTE: Bass boost mute
TCA: Attack time switch
TCR: Recovery time switch
Figure 13 Example of Data Setting Timing in the Serial Mode
D00
D01
D02
D03
D04
D05
D06
D07
D08
D09
D10
D11
D12
LATCH
SHIFT
ATT
A = 1.5 s or higher, B = 1.5 s or higher
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