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參數(shù)資料
| 型號(hào)： | TCM810LENB713 |
| 元件分類： | 電源管理 |
| 英文描述： | 1-CHANNEL POWER SUPPLY SUPPORT CKT, PDSO3 |
| 封裝： | SOT-23B, 3 PIN |
| 文件頁(yè)數(shù)： | 3/6頁(yè) |
| 文件大?。?/td> | 41K |
| 代理商： | TCM810LENB713 |
3
TCM809/810-4
11/30/99
TCM809
TCM810
3-Pin Microprocessor Reset Monitors
valid to VCC = 0V, a pull-down resistor must be connected
from RESET to ground to discharge stray capacitances and
hold the output low (Figure 2). This resistor value, though
not critical, should be chosen such that it does not apprecia-
bly load RESET under normal operation (100k
will be
suitable for most applications). Similarly, a pull-up resistor to
VCC is required for the TCM810 to ensure a valid high
RESET for VCC below 1.0V.
Processors With Bidirectional I/O Pins
Some
P's (such as Motorola 68HC11) have bi-direc-
tional reset pins. Depending on the current drive capability
of the processor pin, an indeterminate logic level may result
if there is a logic conflict. This can be avoided by adding a
4.7k
resistor in series with the output of the TCM809/810
(Figure 3). If there are other components in the system
which require a reset signal, they should be buffered so as
not to load the reset line. If the other components are
required to follow the reset I/O of the
P, the buffer should
be connected as shown with the solid line.
APPLICATIONS INFORMATION
VCC Transient Rejection
The TCM809/810 provides accurate VCC monitoring
and reset timing during power-up, power-down, and brown-
out/sag conditions, and rejects negative-going transients
(glitches) on the power supply line. Figure 1 shows the
maximum transient duration vs. maximum negative excur-
sion (overdrive) for glitch rejection. Any combination of
duration and overdrive which lies under the curve will not
generate a reset signal. Combinations above the curve are
detected as a brownout or power-down. Transient immunity
can be improved by adding a capacitor in close proximity to
the VCC pin of the TCM809/810.
RESET Signal Integrity During Power-Down
The TCM809 RESET output is valid to VCC = 1.0V.
Below this voltage the output becomes an "open circuit" and
does not sink current. This means CMOS logic inputs to the
P will be floating at an undetermined voltage. Most digital
systems are completely shutdown well above this voltage.
However, in situations where RESET must be maintained
Figure 2. Ensuring RESET Valid to VCC = 0V
Figure 1. Maximum Transient Duration vs.
Overdrive for Glitch Rejection at 25
°C
Figure 3. Interfacing to Bidirectional Reset I/O
RESET COMPARATOR OVERDRIVE,
[V
TH - VCC](mV)
400
240
160
320
80
0
1
5
100
1000
MAXIMUM
TRANSIENT
DURATION
(
sec)
TA = +25°C
VTH
Duration
Overdrive
VCC
TCM8XXL/M/J
TCM8XXR/S/T
TCM809
VCC
R1
100k
RESET
GND
TCM809
VCC
RESET
GND
RESET
GND
BUFFERED RESET
TO OTHER SYSTEM
COMPONENTS
BUFFER
P
4.7k
VCC
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| TCM810LVB713 | 制造商:MICROCHIP 制造商全稱:Microchip Technology 功能描述:3-Pin Microcontroller Reset Monitors |
| TCM810LVLB713 | 功能描述:監(jiān)控電路 Microprocessor 4.63V RoHS:否 制造商:STMicroelectronics 監(jiān)測(cè)電壓數(shù): 監(jiān)測(cè)電壓: 欠電壓閾值: 過(guò)電壓閾值: 輸出類型:Active Low, Open Drain 人工復(fù)位:Resettable 監(jiān)視器:No Watchdog 電池備用開(kāi)關(guān):No Backup 上電復(fù)位延遲（典型值）:10 s 電源電壓-最大:5.5 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:UDFN-6 封裝:Reel |
| TCM810LVN | 制造商:MICROCHIP 制造商全稱:Microchip Technology 功能描述:3-Pin Microcontroller Reset Monitors |
| TCM810LVNB713 | 功能描述:監(jiān)控電路 Microprocessor 4.63V RoHS:否 制造商:STMicroelectronics 監(jiān)測(cè)電壓數(shù): 監(jiān)測(cè)電壓: 欠電壓閾值: 過(guò)電壓閾值: 輸出類型:Active Low, Open Drain 人工復(fù)位:Resettable 監(jiān)視器:No Watchdog 電池備用開(kāi)關(guān):No Backup 上電復(fù)位延遲（典型值）:10 s 電源電壓-最大:5.5 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:UDFN-6 封裝:Reel |
| TCM810MEB713 | 制造商:MICROCHIP 制造商全稱:Microchip Technology 功能描述:3-Pin Microcontroller Reset Monitors |
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