參數(shù)資料
型號(hào)： TDA1388TZ
廠商： NXP SEMICONDUCTORS
元件分類： DAC
英文描述： TRI SLMLNE 4 CONT RECT RANG AU
中文描述： SERIAL INPUT LOADING, 20-BIT DAC, PDSO28
文件頁(yè)數(shù)： 6/24頁(yè)
文件大小： 168K
代理商： TDA1388TZ
1995 Dec 08
6
Philips Semiconductors
Objective specification
Bitstream continuous calibration filter-DAC
for CD-ROM audio applications
TDA1388T
FUNCTIONAL DESCRIPTION
The TDA1388T CMOS DAC incorporates an up-sampling
digital filter, a sample-and-hold register, a noise shaper,
continuously calibrated current sources, line amplifiers
and headphone amplifiers. The 1f
s
input data is increased
to an oversampled rate of 64f
s
. This high-rate
oversampling, together with the 5-bit DAC, enables the
filtering required for waveform smoothing and out-of-band
noise reduction to be achieved by simple 1st-order analog
post-filtering.
System clock
The TDA1388T accommodates slave mode only, this
means that in all applications the system devices must
provide the system clock. The system frequency is
selectable. The options are 256f
s
and 384f
s
. The system
clock must be locked in frequency to the I
2
S-bus input
signals.
Table 1
System clock selection
Multiple format input interface
The TDA1388T supports the following data input formats;
I
2
S-bus with data word length of up to 20 bits.
LSB justified serial format with data word length of
16, 18 or 20 bits.
SYSSEL
DESCRIPTION
0
1
256f
s
384f
s
Table 2
Data input formats
The input formats are illustrated in Fig.3. Left and right
data-channel words are time multiplexed.
Input mode
The TDA1388T has two input modes, a static-pin mode
and a microcontroller mode. In the static-pin mode, the
digital sound processing features such as mute left, mute
right and de-emphasis are controlled by external pins. The
other digital sound processing features have a default
value. In the microcontroller mode, all the digital sound
processing features can be controlled by the
microcontroller. The controllable features are;
De-emphasis.
Volume left channel.
Volume right channel.
Flat/min/max switch.
Bass boost.
Treble.
Channel manipulation modes.
The selection of one of the two modes is controlled by the
ACP pin. When this pin is at logic 0 then the static pin
mode will be selected. When the pin is at logic 1 then the
microcontroller mode will be selected.
IF1
IF2
FORMAT
0
0
1
1
0
1
0
1
I
2
S-bus
LSB-justified, 16 bits
LSB-justified, 18 bits
LSB-justified, 20 bits
Table 3
Selectable values of the digital sound processing features
FEATURES
STATIC-PIN MODE
MICROCONTROLLER MODE
De-emphasis
Volume left channel
Volume right channel
Flat/min/max switch
Bass boost
Treble
Mute left channel
Mute right channel
Channel manipulation modes
0 Hz or 44.1 kHz
0 dB (fixed)
0 dB (fixed)
flat (fixed)
flat set (fixed)
flat set (fixed)
external pin
external pin
L_CHANNEL = L (fixed)
R_CHANNEL = R (fixed)
0 Hz or 44.1 kHz
0 dB to
∞
dB
0 dB to
∞
dB
flat/min/max
flat, min or max set
flat, min or max set
selectable (see Table 4)
selectable (see Table 4)
see Table 10
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