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參數(shù)資料
| 型號： | TDA6509ATT |
| 廠商： | NXP SEMICONDUCTORS |
| 元件分類： | 調(diào)諧器 |
| 英文描述： | 3-band mixer/oscillator and PLL for terrestrial tuners |
| 中文描述： | 3-BAND, VIDEO TUNER, PDSO32 |
| 封裝： | 6.10 MM, 0.65 MM PITCH, PLASTIC, MO-153, SOT487-1, TSSOP-32 |
| 文件頁數(shù)： | 8/42頁 |
| 文件大小： | 274K |
| 代理商： | TDA6509ATT |
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2005 Mar 25
8
Philips Semiconductors
Product specification
3-band mixer/oscillator and PLL for
terrestrial tuners
TDA6508; TDA6508A;
TDA6509; TDA6509A
handbook, halfpage
I
V
P
A
I
C
X
A
H
L
M
M
H
R
M
M
TDA6509
TDA6509A
VCC
HIGH_OSCIN2
HIGH_OSCIN1
MID_OSCIN1
MID_OSCIN2
OSC_GND
LOW_OSCOUT
LOW_OSCIN
MDB225
SDA
SCL
P0
P3
P1
P2
IFAMP_IN2
IFAMP_IN1
2
1
3
4
5
6
7
1
1
1
1
1
1
1
9
2
2
2
2
2
3
3
3
8
24
23
21
22
20
19
18
17
Fig.4 Pin configuration for TDA6509 and TDA6509A (HVQFN32).
8
I
2
C-BUS DATA FORMAT
8.1
I
2
C-bus address selection
The address byte ADB contains programmable module
address bits MA1 and MA0 which allow up to four
synthesizers to be used in the same system, and are
configured by applying one of four possible voltages on
pin AS; see Tables 1 and 2. For each voltage on pin AS,
the resultant values of bits MA1 and MA0 are shown in
Table 3.
8.2
Write mode
The write mode is defined by setting bit R/W to logic 0 in
address byte ADB; see Table 1.
Data bytes can be sent to the device after sending the first
addressbyte.Fourdatabytesarerequiredtofullyprogram
the device.
The bus transceiver has an auto-increment facility which
allows the device to be programmed by one transmission
(address byte with 4 data bytes). The device can be
partially programmed provided that the first data byte
following the address byte is divider byte DB1 or control
byte CB.
The MSB of the first data byte DB1 indicates whether
frequency data (MSB = 0) or control and band switch data
willfollow.Additionaldatabytescanbeenteredwithoutthe
need to re-address the device until an I
2
C-bus STOP
command is sent by the controller.
The frequency divider register is loaded after the 8th clock
pulse of byte DB2. The control register is loaded after the
8th clock pulse of byte CB, and the band switch register is
loaded after the 8th clock pulse of byte BB.
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