參數(shù)資料
型號(hào): TDA7417TR
廠商: 意法半導(dǎo)體
英文描述: Car radio audio processor
中文描述: 汽車收音機(jī)音頻處理器
文件頁(yè)數(shù): 13/34頁(yè)
文件大?。?/td> 347K
代理商: TDA7417TR
TDA7417
Description of the audioprocessor
13/34
4
Description of the audioprocessor
4.1
Input stages
In the basic configuration, one stereo quasi-differential, one selectable full-differential and
two single ended stereo inputs are available. As
Figure 3
shown.
Quasi-differential stereo Input (QD)
The QD input is implemented as a buffered quasi-differential stereo stage with 100k
Ω
input-
impedance at each input. The attenuation is fixed to -3.5dB in order to adapt the incoming
signal level.
Single-ended stereo input (SE1, SE2)
The input-impedance at each input is 100k
Ω
and the attenuation is fixed to -3.5dB for
incoming signals.
Full differential stereo Input (FD)
The FD input is implemented as a selectable full-differential stereo stage with 50k input-
impedance at each input or high impedance status. The attenuation is fixed to -3.5dB in
order to adapt the incoming signal level.The high impedance status is 100k
Ω
Figure 3.
Input stage
4.2
AutoZero
The AutoZero allows a reduction of the number of pins as well as external components by
canceling any offset generated by or before the In-Gain-stage (Please notice that externally
generated offsets, e.g. generated through the leakage current of the coupling capacitors,
are not canceled).
The auto-zeroing is started every time the input source is changed and needs max.
0.32ms
for the alignment. To avoid audible clicks the Audio processor is muted before the loudness
stage during this time.
Quasi-differential
SEL1/SER1
SEL2/SER2
Full-differential
Mute
InGain
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