參數(shù)資料
型號(hào)： TDA8043
廠商： NXP Semiconductors N.V.
英文描述： ECONOLINE: RB & RA - Dual Output from a Single Input Rail- Power Sharing on Output- Industry Standard Pinout- 1kVDC & 2kVDC Isolation- Custom Solutions Available- UL94V-0 Package Material- Efficiency to 85%
中文描述： 衛(wèi)星解調(diào)器和解碼器SDD
文件頁數(shù)： 2/16頁
文件大?。?/td> 95K
代理商： TDA8043
1998 Feb 13
2
Philips Semiconductors
Product specification
Satellite Demodulator and Decoder (SDD)
TDA8043
FEATURES
One-chip Digital Video Broadcasting (DVB) compliant
demodulator and concatenated Viterbi/Reed-Solomon
decoder with de-interleaver and de-randomizer
3.3 V supply voltage (up to 5 V allowed)
Internal clock divider
On-chip crystal oscillator
QPSK/BPSK demodulator:
– Interpolator to handle variable symbol rates without
an external anti-aliasing filter
– On-chip Automatic Gain Control (AGC) of the analog
input I and Q baseband signals or tuner AGC control
– Two on-chip matched Analog-to-Digital Converters
(ADCs; 7 bits)
– Square-Root Raised-Cosine Nyquist filter with
programmable roll-off factor
– High maximum symbol frequency: 32 Msymbols/s
– Can be used at low channel Es/No
(Symbol energy-to-noise ratio)
– Internal carrier recovery, clock recovery and AGC
loops with programmable loop filters
– Two carrier recovery loops enabling phase tracking of
the incoming symbols
– Different modulation schemes: Quadrature Phase
Shift Keying (QPSK) and Binary-Phase Shift Keying
(BPSK)
– Signal-to-noise ratio (S/N) estimation
– External indication of demodulator lock.
Viterbi decoder:
– Rate
1
2
convolutional code based
– Constraint length K = 7 with G
1
= 171
oct
and
G
2
= 133
oct
– Supported puncturing code rates:
1
2
,
2
3
,
3
4
,
4
5
,
5
6
,
6
7
,
7
8
and
8
9
– 4 bits ‘soft decision’ inputs for both I and Q
– Truncation length: 144
– Automatic synchronization to correct puncturing rate
and spectral inversion
– Channel Bit Error Rate (BER) estimation from
10
2
to 10
8
– External indication of Viterbi synchronization lock
– Differential decoding supported.
Reed-Solomon (RS) decoder:
– (204, 188 and T = 8) Reed Solomon code
– Automatic (I
2
C-bus configurable) synchronization of
bytes, transport packets and frames
– Internal convolutional de-interleaving (I = 12; using
internal memory)
– De-randomizer based on Pseudo Random Binary
Sequence (PRBS)
– External indication of RS decoder sync lock
– External indication of uncorrectable errors (transport
error indicator is set)
– Indication of the number of lost blocks
– Indication of the number of corrected blocks/bytes.
I
2
C-bus interface:
– I
2
C-bus interface initializes and monitors the
demodulator and Forward Error Correction (FEC)
decoder with standby mode; when no I
2
C-bus is
used, default mode is defined
– 4-bit I/O expander for flexible access to and from the
I
2
C-bus
– I
2
C-bus configurable interrupt pin
– Standby mode for reduced power consumption.
Package: QFP100
Boundary scan test.
APPLICATIONS
Demodulation and FEC for digital satellite TV.
相關(guān)PDF資料
PDF描述
TDA8043H Satellite Demodulator and Decoder SDD
TDA8044 Satellite demodulator and decoder
TDA8044A Satellite demodulator and decoder
TDA8044AH Satellite demodulator and decoder
TDA8044H Satellite demodulator and decoder
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
TDA8043H 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:Satellite Demodulator and Decoder SDD
TDA8044 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:Satellite demodulator and decoder
TDA8044A 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:Satellite demodulator and decoder
TDA8044AH 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:Satellite demodulator and decoder
TDA8044H 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:Satellite demodulator and decoder
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。

采購需求

(若只采購一條型號(hào)，填寫一行即可)

發(fā)布成功！您可以繼續(xù)發(fā)布采購。也可以進(jìn)入我的后臺(tái)，查看報(bào)價(jià)

發(fā)布成功！您可以繼續(xù)發(fā)布采購。也可以進(jìn)入我的后臺(tái)，查看報(bào)價(jià)

*型號(hào) *數(shù)量 廠商 批號(hào) 封裝
添加更多采購

我的聯(lián)系方式

*
*
*