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參數(shù)資料
| 型號： | TDA8046 |
| 廠商： | NXP Semiconductors N.V. |
| 英文描述： | ECONOLINE: RB & RA - Dual Output from a Single Input Rail- Power Sharing on Output- Industry Standard Pinout- 1kVDC & 2kVDC Isolation- Custom Solutions Available- UL94V-0 Package Material- Efficiency to 85% |
| 中文描述： | 多模QAM解調(diào)器 |
| 文件頁數(shù)： | 15/48頁 |
| 文件大?。?/td> | 245K |
| 代理商： | TDA8046 |
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1996 Nov 19
15
Philips Semiconductors
Product specification
Multi-mode QAM demodulator
TDA8046
7.1.5
C
LOCK RECOVERY
The clock recovery function uses the unequalized I and Q
signals, i.e. the half Nyquist filter outputs (see Fig.4).
The clock recovery section generates a control value each
symbol period. As this algorithm is based on the energy
maximization, both main and mid symbols are required at
the input. Consequently, the input data rate is twice the
symbol rate. The schematic diagram of this detector is
illustrated in Fig.11.
The clock generator generates the required internal clocks
from the VCXO clock signal at 4
×
r
s
. The input stage
amplifier of this generator enables the designer to supply
a low amplitude oscillator signal to the TDA8046. The DAC
output current range (I
CLK
) can be varied via the I
2
C-bus.
The sign of the output current can also be inverted to
adjust for the correct sign of the VCXO slope.
For characteristics see Chapter 13.
Fig.11 Schematic diagram of the clock recovery.
handbook, full pagewidth
DAC
rs
Iref3
ICLK
Vref
external
CLOCK
RECOVERY
DETECTOR
I
Q
to
VCXO
from
VCXO
4rs
2rs
rs
MGG172
2
4
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| TDA8046H | Multi-mode QAM demodulator |
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| TDA8361 | Integrated PAL and PAL/NTSC TV processors(集成PAL和PAL/NTSC TV處理器) |
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| TDA8046H | 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:Multi-mode QAM demodulator |
| TDA8050 | 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:TDA8046H |
| TDA8050A | 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:QPSK transmitter |
| TDA8050T | 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:TDA8046H |
| TDA8051 | 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:QPSK receiver |
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