參數(shù)資料
型號: TDA8138
廠商: 意法半導(dǎo)體
英文描述: 5.1V+ 12V REGULATOR WITH DISABLE AND RESET
中文描述: 的5.1V 12V的穩(wěn)壓器具有禁用和RESET
文件頁數(shù): 3/6頁
文件大?。?/td> 103K
代理商: TDA8138
ELECTRICAL CHRACTERISTICS
(V
IN1
= 7V, V
IN2
= 14V, T
j
= 25
o
C, unless otherwise specified)
Symbol
V
O1
V
O2
V
O1
V
O2
Parameter
Test Conditions
I
O1
= 10mA
I
O2
= 10mA
7V < V
IN1
< 14V
14 < V
IN2
< 18V
5mA < I
O1,2
< 750mA
Min.
5
11.76
4.9
11.5
Typ.
5.1
12
Max.
5.2
12.24
5.3
12.5
Unit
V
V
V
V
Output Voltage
Output Voltage
Output Voltage
Output Voltage
V
IO1,2
Dropout Voltage
I
O1,2
= 750mA
I
O1,2
= 1A
7V < V
IN1
< 14V
14 < V
< 18V
I
O1,2
= 200mA
5mA < I
O1
< 0.6A
5mA < I
O2
< 0.6A
I
O1
= 10mA
Output 2 Disabled
K = V
O1
1.4
2
50
120
V
V
V
O1,2LI
Line Regulation
mV
mV
V
O1,2LO
Load Regulation
100
250
2
mV
mV
mA
I
Q
Quiescent Current
V
O1RST
Reset Thrseshold Voltage
K - 0.4
K -
0.25
50
25
K - 0.1
V
V
RTH
t
RD
Reset Thrseshold Hysteresis
Reset Pulse Delay
See circuit description
C
e
= 100nF
See circuit description
I
5
= 5mA
V
5
= 10V
20
75
mV
ms
V
RL
I
RH
Saturation Voltage in Reset Condition
Leakage Current in Normal Condition
(at Pin 6 for SIP9 or Pin 5 for Heptawatt)
Output Voltage Thermal Drift
0.4
10
V
μ
A
K
O1,2
T
j
= 0 to 125
o
C
K
O
=
V
O
10
6
T
V
O
V
IN1
= 7V, V
= 14V
V
IN1,2
= 16V (see Note)
100
ppm/
o
C
I
O1,2SC
Short Circuit Output Current
1.6
1
A
A
V
V
μ
A
o
C
V
DISH
V
DISL
I
DIS
T
jsd
Disable Voltage High (out 2 active)
Disable Voltage Low (out 2 disabled)
Disable Bias Current
Junction Temperature for Thermal Shut
Down
2
0.8
2
0V < V
DIS
< 7V
-100
145
Note :
Safe permanent short-circuit is only guaranteed for input voltages up to 16V.
8
The TDA8138 is a dual voltage regulator with Reset
and Disable (TD8138A : Disable only, TDA8138B :
Reset only).
The two regulation parts are supplied from one
voltage reference circuit trimmed by zener zap
during EWS test.
Since the supply voltage of this last is connected at
Pin 1 (V
IN1
), the regulator 2 will not work if Pin 1 is
not supplied.
The outputs stage have been realized in darlington
configuration with a drop typical 1.2V.
The disable circuit, switch-off the output 2 if a
voltage lower than 0.8V is applied at Pin 3
(Heptawatt) or Pin 4 (SIP9)
The Reset circuit checks the voltage at the out-
put 1. If this one goes below V
OUT
- 0.25V (4.85V
typ.), the comparator "a" (see Figure 1) discharges
rapidly the capacitor C
e
and the reset output goes
at once Low. When the voltage at the out1 rises
above V
OUT
- 0.2V (4.9V typ.), the voltage V
Ce
increases linearly to 2.5V corresponding to a delay
td following the law : t
1
=
C
e
2.5V
10
μ
A
(see Figure 2),
then the reset output goes high again. To avoid
gliches in the reset output, the second comparator
"b" has a large hysteresis (1.9V).
CIRCUIT DESCRIPTION
TDA8138
3/6
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