- 您現(xiàn)在的位置：買(mǎi)賣(mài)IC網(wǎng) > PDF目錄368629 > TDA8361 (NXP SEMICONDUCTORS) Integrated PAL and PAL/NTSC TV processors(集成PAL和PAL/NTSC TV處理器) PDF資料下載
參數(shù)資料
| 型號(hào)： | TDA8361 |
| 廠商： | NXP SEMICONDUCTORS |
| 元件分類(lèi)： | 消費(fèi)家電 |
| 英文描述： | Integrated PAL and PAL/NTSC TV processors(集成PAL和PAL/NTSC TV處理器) |
| 中文描述： | SPECIALTY CONSUMER CIRCUIT, PDIP52 |
| 封裝： | 0.600 INCH, SHRINK, PLASTIC, SOT-247AG, DIP-52 |
| 文件頁(yè)數(shù)： | 17/36頁(yè) |
| 文件大小： | 200K |
| 代理商： | TDA8361 |
第1頁(yè)第2頁(yè)第3頁(yè)第4頁(yè)第5頁(yè)第6頁(yè)第7頁(yè)第8頁(yè)第9頁(yè)第10頁(yè)第11頁(yè)第12頁(yè)第13頁(yè)第14頁(yè)第15頁(yè)第16頁(yè)當(dāng)前第17頁(yè)第18頁(yè)第19頁(yè)第20頁(yè)第21頁(yè)第22頁(yè)第23頁(yè)第24頁(yè)第25頁(yè)第26頁(yè)第27頁(yè)第28頁(yè)第29頁(yè)第30頁(yè)第31頁(yè)第32頁(yè)第33頁(yè)第34頁(yè)第35頁(yè)第36頁(yè)
March 1994
17
Philips Semiconductors
Objective specification
Integrated PAL and PAL/NTSC TV
processors
TDA8360; TDA8361; TDA8362
Delay line and peaking circuit
Y
DELAY LINE
t
d
B
delay time
bandwidth of internal delay line
note 7
note 7
8
480
ns
MHz
PEAKING CONTROL
;
NOTE
28,
SEE ALSO FIG
.6 (
PIN
14)
t
W
width of preshoot or overshoot
at 50% of pulse;
note 7
160
ns
S
cth
peaking signal compression
threshold
input current when no video input
signal present
voltage level to switch off peaking
50
IRE
I
14
1
mA
V
I
7
V
Horizontal and vertical synchronization circuits
S
YNC VIDEO INPUT
(
TDA
8361,
TDA
8362;
PINS
13
AND
15)
V
13
sync pulse amplitude
referenced to pin 15;
note 3
note 29
50
300
mV
SL
slicing level
50
%
VERTICAL SYNC
t
W
width of the vertical sync pulse
without sync instability
note 30
22
μ
s
H
ORIZONTAL OSCILLATOR
f
fr
f
fr
f
osc
/
V
P
free running frequency
spread on free running frequency
frequency variation with respect to
the supply voltage
frequency variation with temperature
note 44
15625
0.2
±
2
0.5
Hz
%
%
V
P
= 8 V
±
10%;
note 7
T
amb
= 25
°
C
±
50
°
C;
note 7
f
osc
/
T
1
Hz/K
f
osc( max
)
maximum frequency deviation at the
start of the horizontal output
75
%
F
IRST CONTROL LOOP
;
NOTE
31 (
FILTER CONNECTED TO PIN
40)
f
HR
f
CR
S/N
holding range PLL
catching range PLL
signal-to-noise ratio of the video input
signal at which the time constant is
switched
hysteresis at the switching point
±
0.6
±
0.9
±
0.9
20
±
1.2
kHz
kHz
dB
note 7
HYS
3
dB
SYMBOL
PARAMETER
CONDITIONS
MIN.
TYP.
MAX.
UNIT
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| TDA8362 | Integrated PAL and PAL/NTSC TV processors(集成PAL和PAL/NTSC TV處理器) |
| TDA8360 | Integrated PAL and PAL/NTSC TV processors(集成PAL和PAL/NTSC TV處理器) |
| TDA8417 | TV and VTR stereo/dual sound processor with integrated filters and IIC-bus control(帶IIC總線控制和集成濾波器的的 TV和VTR立體聲/雙聲道處理器) |
| TDA8425 | Hi-Fi stereo audio processor;IIC-bus(IIC總線 高保真立體聲音頻處理器) |
| TDA8559T | Low-voltage stereo headphone amplifier |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| TDA8362 | 制造商:PHILIPS 制造商全稱(chēng):NXP Semiconductors 功能描述:Integrated PAL and PAL/NTSC TV processors |
| TDA8366 | 制造商:PHILIPS 制造商全稱(chēng):NXP Semiconductors 功能描述:I2C-bus controlled PAL/NTSC TV processor |
| TDA8366H | 制造商:PHILIPS 制造商全稱(chēng):NXP Semiconductors 功能描述:I2C-bus controlled PAL/NTSC TV processor |
| TDA8370 | 制造商:PHILIPS 制造商全稱(chēng):NXP Semiconductors 功能描述:Synchronization processor for television receivers |
| TDA8373 | 制造商:PHILIPS 制造商全稱(chēng):NXP Semiconductors 功能描述:I2C-bus controlled economy PAL/NTSC and NTSC TV-processors |
發(fā)布緊急采購(gòu)，3分鐘左右您將得到回復(fù)。