參數(shù)資料
型號: TDA8425
廠商: NXP SEMICONDUCTORS
元件分類: 音頻控制
英文描述: Hi-Fi stereo audio processor;IIC-bus(IIC總線 高保真立體聲音頻處理器)
中文描述: 2 CHANNEL(S), TONE CONTROL CIRCUIT, PDIP20
封裝: PLASTIC, DIP-20
文件頁數(shù): 6/24頁
文件大?。?/td> 285K
代理商: TDA8425
October 1988
6
Philips Semiconductors
Product specification
Hi-fi stereo audio processor; I
2
C-bus
TDA8425
Subaddress
After the module address byte a second byte is used to select the following functions:
Volume left, volume right, bass, treble and switch functions
The subaddress SAD is stored within the TDA8425. Table 1 defines the coding of the second byte after the module
address MAD.
Table 1
Second byte after module address MAD
The automatic increment feature of the slave address enables a quick slave receiver initialization, within one
transmission, by the I
2
C-bus controller (see Fig.5).
Definition of 3rd byte
A third byte is used to transmit data to the TDA8425. Table 2 defines the coding of the third byte after module address
MAD and subaddress SAD.
Table 2
Third byte after module address MAD and subaddress SAD
function
128
64
32
16
8
4
2
1
MSB
LSB
7
6
5
4
3
2
1
0
volume left
volume right
bass
treble
switch functions
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
0
0
0
0
0
subaddress SAD
0
0
1
1
0
0
1
0
1
0
function
MSB
LSB
7
6
5
4
3
2
1
0
volume left
volume right
bass
treble
switch functions
VL
VR
BA
TR
S1
1
1
1
1
1
1
1
1
1
1
V05
V15
1
1
MU
V04
V14
1
1
EFL
V03
V13
BA3
TR3
STL
V02
V12
BA2
TR2
ML1
V01
V11
BA1
TR1
ML0
V00
V10
BA0
TR0
IS
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