參數(shù)資料
型號: TDA8540
廠商: NXP SEMICONDUCTORS
元件分類: 運(yùn)動控制電子
英文描述: 4 X 4 video switch matrix
中文描述: AUDIO/VIDEO SWITCH, PDIP20
封裝: 0.300 INCH, PLASTIC, DIP-20
文件頁數(shù): 5/20頁
文件大?。?/td> 131K
代理商: TDA8540
1995 Feb 06
5
Philips Semiconductors
Product specification
4
×
4 video switch matrix
TDA8540
FUNCTIONAL DESCRIPTION
The TDA8540 is controlled via a bidirectional I
2
C-bus.
3 bits of the I
2
C address can be selected via the address
pin, thus providing a facility for parallel connection of
7 devices.
Control options via the I
2
C-bus:
The input signals can be clamped at their negative peak
(top sync).
The gain factor of the outputs can be selected between
1
×
or 2
×
.
Each of the four outputs can individually be connected
to one of the four inputs.
Each output can individually be set in a high impedance
state.
Two binary output data lines can be controlled for
switching accompanying sound signals.
The SDA and SCL pins (pins 19 and 18) can be connected
to the I
2
C-bus or to DC switching voltage sources. Address
inputs S0 to S2 (pins 11, 7 and 5) are used to select
sub-addresses or switching to the non-I
2
C mode. Inputs
S0 to S2 can be connected to the supply voltage (HIGH) or
the ground (LOW). In this way no peripheral components
are required for selection.
Table 1
I
2
C-bus sub-addressing
I
2
C-bus control
After power-up the outputs are initialized in the high
impedance state, and D0 and D1 are at a LOW level.
Detailed description of the I
2
C-bus specification, with
applications, is given in brochure “The I
2
C-bus and how to
use it” This brochure may be ordered using the code
9398 393 40011.
The TDA8540 is a
slave receiver
and the protocol is given
in Table 2.
S2
S1
S0
SUB-ADDRESS
A2
A1
A0
L
L
L
L
H
H
H
H
L
L
H
H
L
L
H
H
L
H
L
H
L
H
L
H
0
0
0
0
1
1
1
non I
2
C addressable
0
0
1
1
0
0
1
0
1
0
1
0
1
0
Table 2
The TDA8540 protocol
Notes
1.
2.
3.
4.
S = START condition.
Data transmission to the TDA8540 starts with the slave address (SLV).
A = acknowledge bit, generated by TDA8540.
P = STOP condition.
Table 3
Data transmission to the TDA8540 begins with SLV
Notes
1.
2.
A2 to A0: pin programmable slave address bits.
R/W = 0; write only.
After the SLV, a second byte, SUB, is required for selecting the functions, as shown in Table 4.
SEQUENCE
A
(3)
S
(1)
SLV
(2)
A
(3)
SUB
DATA
A
(3)
DATA
A
(3)
P
(4)
A6
MSB
A5
A4
A3
A2
A1
A0
R/W
LSB
0
(2)
1
0
0
1
A2
(1)
A1
(1)
A0
(1)
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