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參數(shù)資料
| 型號： | TDA8708AT-T |
| 廠商： | NXP SEMICONDUCTORS |
| 元件分類： | 消費家電 |
| 英文描述： | SPECIALTY CONSUMER CIRCUIT, PDSO28 |
| 文件頁數(shù)： | 20/24頁 |
| 文件大小： | 124K |
| 代理商： | TDA8708AT-T |
June 1994
5
Philips Semiconductors
Product specication
Video analog input interface
TDA8708A
FUNCTIONAL DESCRIPTION
The TDA8708A provides a simple interface for decoding
video signals.
The TDA8708A operates in configuration mode 1 (see
Fig.4) when the video signals are weak (i.e. when the gain
of the AGC amplifier has not yet reached its optimum
value). This enables a fast recovery of the synchronization
pulses in the decoder circuit. When the pulses at the
GATE A and GATE B inputs become distinct (GATE A and
GATE B pulses are synchronization pulses occurring
during the sync period and rear porch respectively) the
TDA8708A automatically switches to configuration mode 2
(see Fig.5).
When the TDA8708A is in configuration mode 1, the gain
of the AGC amplifier will be roughly adjusted (sync level to
a digital output level of 0 and the peak level to a digital
output level of 255).
In configuration mode 2 the digital output of the ADC is
compared to internal digital reference levels. The resultant
outputs control the charge or discharge current of a
capacitor connected to the AGC pin. The voltage across
this capacitor controls the gain of the video amplifier. This
is the gain control loop.
The sync level comparator is active during a positive-going
pulse at the GATE A input. This means that the sync pulse
of the composite video signal is used as an amplitude
reference. The bottom of the sync pulse is adjusted to
obtain a digital output of logic 0 at the converter output. As
the black level is at digital level 64, the sync pulse will have
a digital amplitude of 64 LSBs.
The peak-white control loop is always active. If the video
signal tends to exceed the digital code of 248, the gain will
be limited to avoid any over-range of the converter.
The use of nominal signals will prevent the output from
exceeding a digital code of 213 and the peak-white control
loop will be non-active.
The clamp level control is accomplished by using the same
techniques as used for the gain control. The black-level
digital comparator is active during a positive-going pulse at
the GATE B input. The clamp capacitor will be charged or
discharged to adjust the digital output to code 64.
LIMITING VALUES
In accordance with the Absolute Maximum Rating System (IEC 134).
THERMAL CHARACTERISTICS
SYMBOL
PARAMETER
MIN.
MAX.
UNIT
VCCA
analog supply voltage
0.3
+7.0
V
VCCD
digital supply voltage
0.3
+7.0
V
VCCO
output supply voltage
0.3
+7.0
V
VCC
supply voltage difference between VCCA and VCCD
1.0
+1.0
V
supply voltage difference between VCCO and VCCD
1.0
+1.0
V
supply voltage difference between VCCA and VCCO
1.0
+1.0
V
VI
input voltage
0.3
VCCA
V
IO
output current
0
+10
mA
Tstg
storage temperature
55
+150
°C
Tamb
operating ambient temperature
0
+70
°C
Tj
junction temperature
0
+125
°C
SYMBOL
PARAMETER
VALUE
UNIT
Rth j-a
thermal resistance from junction to ambient in free air
SOT117-1
55
K/W
SOT136-1
70
K/W
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| TDA8708B | 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:Video analog input interface |
| TDA8708BT | 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:Video analog input interface |
| TDA8708T SOIC | 制造商:NXP Semiconductors 功能描述: |
| TDA8709 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述: |
| TDA8709A | 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:Video analog input interface |
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