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參數(shù)資料
| 型號： | TDA8761M |
| 廠商： | NXP SEMICONDUCTORS |
| 元件分類： | ADC |
| 英文描述： | 9-bit analog-to-digital converter for digital video |
| 中文描述： | 1-CH 9-BIT RESISTANCE LADDER ADC, PARALLEL ACCESS, PDSO28 |
| 封裝： | 5.30 MM, PLASTIC, MO-150AH, SOT-341-1, SSOP-28 |
| 文件頁數(shù)： | 8/20頁 |
| 文件大小： | 93K |
| 代理商： | TDA8761M |
1995 Mar 20
8
Philips Semiconductors
Preliminary specification
9-bit analog-to-digital converter for
digital video
TDA8761
B
ANDWIDTH
(f
clk
= 30 MHz)
B
analog bandwidth
full-scale sine wave;
note 6
75% full-scale sine
wave; note 6
small signal at
mid-scale;
V
I
=
±
10 LSB at
code 256; note 6
full-scale square wave;
Fig.5; note 7
full-scale square wave;
Fig.5; note 7
40
MHz
55
MHz
700
MHz
t
STLH
analog input settling time
LOW-to-HIGH
analog input settling time
HIGH-to-LOW
2.0
tbf
ns
t
STHL
2.5
tbf
ns
H
ARMONICS
(f
clk
= 30 MH
Z
)
THD
total harmonic distortion
f
i
= 10 MHz
64
dB
S
IGNAL
-
TO
-
NOISE RATIO
; see Fig.7; note 8
S/N
signal-to-noise ratio (full scale)
without harmonics;
f
clk
= 30 MHz;
f
i
= 10 MHz
53
55
dB
E
FFECTIVE BITS
; see Fig 6; note 8
EB
effective bits
f
clk
= 30 MHz;
f
i
= 10 MHz
8.5
bits
T
WO
-
TONE
; note 9
TTIR
two-tone intermodulation rejection
f
clk
= 30 MHz
64
dB
B
IT ERROR RATE
BER
bit error rate
f
clk
= 30 MHz;
f
i
= 10 MHz;
V
I
=
±
16 LSB at
code 256
10
13
times/
sample
D
IFFERENTIAL GAIN
; note 10
G
diff
differential gain
f
clk
= 30 MHz;
PAL modulated ramp
tbf
%
D
IFFERENTIAL PHASE
; note 10
diff
differential phase
f
clk
= 30 MHz;
PAL modulated ramp
tbf
deg
Timing (f
clk
= 30 MHz; C
L
= 15 pF);
see Fig.3; note 11
t
ds
t
h
t
d
C
L
sampling delay time
output hold time
output delay time
digital output load
5
10
15
2
14
40
ns
ns
ns
pF
SYMBOL
PARAMETER
CONDITIONS
MIN.
TYP.
MAX.
UNIT
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