•
      參數(shù)資料
      型號： TDA8764TS
      廠商： NXP Semiconductors N.V.
      英文描述： 10-bit high-speed low-power ADC with internal reference regulator
      中文描述： 10位高速低的內(nèi)部參考調(diào)節(jié)功率ADC
      文件頁數(shù)： 13/28頁
      文件大?。?/td> 184K
      代理商： TDA8764TS
      1999 Jan 12
      13
      Philips Semiconductors
      Preliminary specification
      10-bit high-speed low-power ADC with
      internal reference regulator
      TDA8764
      Notes
      1.
      In addition to a good layout of the digital and analog ground, it is recommended that the rise and fall times of the clock
      must not be less than 0.5 ns.
      2.
      The input admittance is
      3.
      Analog input voltages producing code 0 up to and including code 1023:
      a) V
      offset(B)
      (offset voltage BOTTOM) is the difference between the analog input which produces data equal to 00
      and the reference voltage BOTTOM (V
      RB
      ) at T
      amb
      = 25
      °
      C.
      b) V
      offset(T)
      (offset voltage TOP) is the difference between reference voltage TOP (V
      RT
      ) and the analog input which
      produces data outputs equal to code 1023 at T
      amb
      = 25
      °
      C.
      In order to ensure the optimum linearity performance of such converter architecture the lower and upper extremities
      of the converter reference resistor ladder (corresponding to output codes 0 and 1023 respectively) are connected to
      pins V
      RB
      and V
      RT
      via offset resistors R
      OB
      and R
      OT
      as shown in Fig.4.
      4.
      a) The current flowing into the resistor ladder is
      and the full-scale input range at the converter,
      to cover code 0 to code 1023, is
      b) Since R
      L
      , R
      OB
      and R
      OT
      have similar behaviour with respect to process and temperature variation, the ratio
      R
      R
      OB
      R
      L
      R
      OT
      +
      +
      will be kept reasonably constant from device to device. Consequently variation of the output
      codes at a given input voltage depends mainly on the difference V
      RT
      V
      RB
      and its variation with temperature and
      supply voltage. When several ADCs are connected in parallel and fed with the same reference source, the
      matching between each of them is then optimized.
      5.
      6.
      The analog bandwidth is defined as the maximum input sine wave frequency which can be applied to the device.
      No glitches greater than 2 LSBs, nor any significant attenuation are observed in the reconstructed signal.
      The analog input settling time is the minimum time required for the input signal to be stabilized after a sharp full-scale
      input (square wave signal) in order to sample the signal and obtain correct output data.
      Effective bits are obtained via a Fast Fourier Transform (FFT) treatment taking 8 K acquisition points per equivalent
      fundamental period. The calculation takes into account all harmonics and noise up to half of the clock frequency
      (NYQUIST frequency). Conversion to signal-to-noise ratio: SINAD = EB
      ×
      6.02 + 1.76 dB.
      Intermodulation measured relative to either tone with analog input frequencies of 5 and 5.1 MHz. The two input
      signals have the same amplitude and the total amplitude of both signals provides full-scale to the converter.
      10. Output data acquisition: the output data is available after the maximum delay time of t
      d(max)
      . For the 80 MHz version
      it is recommended to have the lowest possible output load.
      7.
      8.
      9.
      V
      i
      1
      R
      i
      ----
      Cijw
      +
      =
      I
      L
      V
      V
      +
      R
      OB
      R
      L
      R
      R
      L
      R
      OT
      +
      -----------------------------------------
      =
      V
      I
      R
      L
      I
      L
      ×
      R
      OB
      R
      OT
      +
      +
      -----------------------------------------
      V
      RT
      V
      RB
      –
      (
      )
      0.866
      V
      RT
      V
      RB
      –
      (
      )
      ×
      =
      ×
      =
      =
      -----------------------------------------
      E
      G
      V
      --------------------V
      V
      –
      i p
      (
      )
      V
      i p
      p
      –
      )
      –
      p
      –
      )
      100
      ×
      =
      相關(guān)PDF資料
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      相關(guān)代理商/技術(shù)參數(shù)
      參數(shù)描述
      TDA8764TS/4 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:10-bit high-speed low-power ADC with internal reference regulator
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