參數(shù)資料
型號: TDA8780M
廠商: NXP SEMICONDUCTORS
元件分類: 運動控制電子
英文描述: True logarithmic amplifier
中文描述: LOG OR ANTILOG AMPLIFIER, 14 MHz BAND WIDTH, PDSO20
封裝: 4.40 MM, PLASTIC, SOT-266-1, SSOP-20
文件頁數(shù): 5/16頁
文件大?。?/td> 70K
代理商: TDA8780M
1995 Jul 25
5
Philips Semiconductors
Product specification
True logarithmic amplifier
TDA8780M
FUNCTIONAL DESCRIPTION
A true logarithmic amplifier can be realized from a cascade
of similar stages each stage consisting of a pair of
amplifiers whose inputs and outputs are connected in
parallel. One of these amplifiers can be formed by an
undegenerated long-tailed pair which provides high gain
but limited linear input signal-handling capability. The
other amplifier can be formed by a degenerated long-tailed
pair which provides a gain of unity and a much larger linear
input signal-handling capability.
The overall cascade amplifies very small input signals but,
once these reach the level at which the undegenerated
long-tailed pair in the last stage is at the limit of its linear
signal-handling capability, the output voltage becomes
logarithmically dependent on the input signal level. This
behaviour continues until the input signal reaches the level
at which undegenerated long-tailed pair in the first stage is
at the limit of its linear input signal-handling capability. The
transfer characteristic beyond this point then depends on
the exact configuration of the degenerated long-tailed pair
in the first stage.
Five stages are used in the TDA8780M to provide a 72 dB
true logarithmic dynamic range. The DC bias current in the
undegenerated long-tailed pair in the first stage is made
externally adjustable, using an off-chip resistor, to provide
a small-signal gain adjustment facility. The small signal
gain defined by this resistor is valid when the IC is
operating in the “l(fā)inear” mode, for input signals typically
less than 60
μ
V.
A high-level limiter is inserted between the first and second
stages to provide a constant limiting output voltage which
is essentially independent of the value of the gain setting
resistor. These stages can be driven by single-ended or
differential inputs. The DC operating point is set by overall
on-chip feedback decoupled by two off-chip capacitors
which define the low-frequency cut-off point. The
performance is stabilized against temperature and DC
power supply variations. The input to the true logarithmic
amplifier is protected against damage due to excessive
differential input signals by diodes.
The differential output from the true logarithmic amplifier is
converted internally to a single-ended output by an on-chip
operational amplifier arrangement in which the DC output
level is set by an externally-supplied reference voltage.
The output is capable of driving loads down to 10 k
. The
limiting output voltage and the output drive capability have
been chosen to facilitate interfacing to analog-to-digital
converters. A major part of the DC power supply current
consumption of the device is associated with provision of
this output drive capability. The DC power supply
consumption is significantly less when the device is driving
smaller loads.
A power-down facility allows the circuit to be disabled from
a TTL-level compatible control input.
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