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參數(shù)資料
| 型號： | TDA8840 |
| 廠商： | NXP Semiconductors N.V. |
| 英文描述： | I2C-bus controlled PAL/NTSC/SECAM TV processors |
| 中文描述： | I2C總線控制的PAL / NTSC制式/ SECAM電視處理器 |
| 文件頁數(shù)： | 14/68頁 |
| 文件大?。?/td> | 316K |
| 代理商： | TDA8840 |
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December 16, 1997
14
Philips Semiconductors
Tentative Device Specification
I
2
C-bus controlled PAL/NTSC/SECAM TV
processors
TDA884X/5X-N2 series
Overvoltage conditions (X-ray protection) can be detected
via the EHT tracking pin. When an overvoltage condition is
detected the horizontal output drive signal will be
switched-off via the slow stop procedure but it is also
possible that the drive is not switched-off and that just a
protection indication is given in the I
2
C-bus output byte.
The choice is made via the input bit PRD. The IC’s have a
second protection input on the
2
filter capacitor pin. When
this input is activated the drive signal is switched-off
immediately and switched-on again via the slow start
procedure. For this reason this protection input can be
used as “flash protection”.
The drive pulses for the vertical sawtooth generator are
obtained from a vertical countdown circuit. This countdown
circuit has various windows depending on the incoming
signal (50 Hz or 60 Hz and standard or non standard). The
countdown circuit can be forced in various modes by
means of the I
2
C-bus. During the insertion of RGB signals
the maximum vertical frequency is increased to 72 Hz so
that the circuit can also synchronise on signals with a
higher vertical frequency like VGA. To obtain short
switching times of the countdown circuit during a channel
change the divider can be forced in the search window by
means of the NCIN bit. The vertical deflection can be set
in the de-interlace mode via the I
2
C bus.
To avoid damage of the picture tube when the vertical
deflection fails the guard output current of the TDA
8350/51 can be supplied to the beam current limiting input.
When a failure is detected the RGB-outputs are blanked
and a bit is set (NDF) in the status byte of the I
2
C-bus.
When no vertical deflection output stage is connected this
guard circuit will also blank the output signals. This can be
overruled by means of the EVG bit.
Chroma and luminance processing
The circuits contain a chroma bandpass and trap circuit.
The filters are realised by means of gyrator circuits and
they are automatically calibrated by comparing the tuning
frequency with the X-tal frequency of the decoder. The
luminance delay line and the delay for the peaking circuit
are also realised by means of gyrator circuits. The centre
frequency of the chroma bandpass filter is switchable via
the I
2
C-bus so that the performance can be optimised for
“front-end” signals and external CVBS signals. During
SECAM reception the centre frequency of the chroma trap
is reduced to get a better suppression of the SECAM
carrier frequencies. All IC’s have a black stretcher circuit
which corrects the black level for incoming video signals
which have a deviation between the black level and the
blanking level (back porch). The timeconstant for the black
stretcher is realised internally.
The resolution of the peaking control DAC has been
increased to 6 bits. All IC’s have a defeatable coring
function in the peaking circuit. Some of these IC’s have a
YUV interface (see table on page 2) so that picture
improvement IC’s like the TDA 9170 (Contrast
improvement), TDA 9177 (Sharpness improvement) and
TDA 4556/66 (CTI) can be applied. When the CTI IC’s are
applied it is possible to increase the gain of the luminance
channel by means of the GAI bit in subaddress 03 so that
the resulting RGB output signals are not affected.
Colour decoder
Depending on the IC type the colour decoder can decode
PAL, PAL/NTSC or PAL/NTSC/SECAM signals. The
PAL/NTSC decoder contains an alignment-free X-tal
oscillator, a killer circuit and two colour difference
demodulators. The 90
°
phase shift for the reference signal
is made internally.
The IC’s contain an Automatic Colour Limiting (ACL)
circuit which is switchable via the I
2
C-bus and which
prevents that oversaturation occurs when signals with a
high chroma-to-burst ratio are received. The ACL circuit is
designed such that it only reduces the chroma signal and
not the burst signal. This has the advantage that the colour
sensitivity is not affected by this function.
The SECAM decoder contains an auto-calibrating PLL
demodulator which has two references, viz: the 4.4 MHz
sub-carrier frequency which is obtained from the X-tal
oscillator which is used to tune the PLL to the desired
free-running frequency and the bandgap reference to
obtain the correct absolute value of the output signal. The
VCO of the PLL is calibrated during each vertical blanking
period, when the IC is in search or SECAM mode.
The frequency of the active X-tal is fed to the Fsc output
(pin 33) and can be used to tune an external comb filter
(e.g. the SAA 4961).
The base-band delay line (TDA 4665 function) is
integrated in the PAL/SECAM IC’s and in the NTSC IC
TDA 8846A. In the latter IC it improves the cross colour
performance (chroma comb filter). The demodulated
colour difference signals are internally supplied to the
delay line. The colour difference matrix switches
automatically between PAL/SECAM and NTSC, however,
it is also possible to fix the matrix in the PAL standard.
The “blue stretch” circuit is intended to shift colour near
“white” with sufficient contrast values towards more blue to
obtain a brighter impression of the picture.
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
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| TDA8840H | 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:I2C-bus controlled PAL/NTSC/SECAM TV processors |
| TDA8840-N2 | 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:I2C-bus controlled PAL/NTSC/SECAM TV processors |
| TDA8841 | 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:I2C-bus controlled PAL/NTSC/SECAM TV processors |
| TDA8841H | 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:I2C-bus controlled PAL/NTSC/SECAM TV processors |
| TDA8841-N2 | 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:I2C-bus controlled PAL/NTSC/SECAM TV processors |
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