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2000 May 08
22
Philips Semiconductors
Preliminary specification
I
2
C-bus controlled TV display processors
TDA933xH series
B
EAM CURRENT LIMITING
;
INPUT PIN
43
V
bias
V
CR
V
dif(CR)
internal bias voltage
contrast reduction starting voltage
voltage difference for full contrast
reduction
brightness reduction starting
voltage
voltage difference for full brightness
reduction
internal charge current
maximum discharge current when
the PWL is active
3.5
3.1
2.0
3.6
3.3
2.2
3.7
3.5
2.4
V
V
V
V
bri
1.6
1.8
2.0
V
V
dif(BR)
1
V
I
ch(int)
I
dch(max)
1.5
3.5
2.0
4.0
2.5
4.5
μ
A
mA
P
EAK WHITE LIMITER
; note 19
I
ch(PWL)
charge current PWL filter pin
pin 34; 1f
V
mode
pin 34; 2f
V
mode
pin 34; 1f
V
mode
pin 34; 2f
V
mode
PWL range, 15 steps; at
maximum contrast
13
26
52
100
0.65
16
32
64
120
19
38
76
140
1.0
μ
A
μ
A
μ
A
μ
A
V
I
dch(PWL)
discharge current PWL filter pin
V
i(Y)(b-w)
Y-input signal amplitude at which
peak white limiter is activated
(black-to-white value)
RGB output signal amplitude at
which peak white limiter is activated
(black-to-white value)
V
o(RGB)(b-w)
PWL range, 15 steps;
nominal setting of white
point controls; note 20
2.2
3.4
V
S
OFT CLIPPER
; note 21
G
v(sc)
soft clipper gain reduction
at maximum contrast;
see Fig.9
(A+B)/A; see Fig.9
15
dB
V
o(clip-pwl)
output level compared to PWL for
100 IRE peak signal
118
%
BLUE STRETCH
; note 22
G
RG
decrease of small signal gain for
red and green channels
17
%
F
IXED BEAM CURRENT SWITCH
-
OFF
; notes 23, 24 and 25
V
FBCSO
V
i(FBCSO)(max)
maximum input voltage
I
dch
discharge current when the fixed
beam current function is activated
V
o(max)
maximum output voltage at the
RGB outputs
detection level
1
1.5
1.0
2
5.5
1.15
V
V
mA
sink current pin 44; note 26 0.85
2-point stabilization;
note 26
1-point stabilization;
note 26
TFBC = 0; see Fig.15
TFBC = 1; see Fig.15
6.0
V
5.6
V
t
dch
discharge time of picture tube when
switching to standby
18.6
25
ms
ms
SYMBOL
PARAMETER
CONDITIONS
MIN.
TYP.
MAX.
UNIT