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Test Conditions (referred to the circuit of fig. 2)
V
S
= +24V; I
O
= InternalLimited; T
amb
= 25
°
C;
L
= 1.4H (non saturating); R
l
= 12
; Vi = 2V
(Vih)(#); T
j
= from Lim-Hy to Lim and above (*)
(#) The input signal asks for a permanent”on” state.
(*) Lim & Hy = thresholds of intervention and histeresis of the
internalthermal protection circuit.
OVERLOAD OPERATION
Due to the internal limitation (I
SC
), the output cur-
rent (I
O
) is not limited by the load (V
S
/R
l
= 2A;
I
SC
≤
1.5A) but by the device itself. As soon as
the current reaches I
SC
, the I.P.S. goes out of the
minimum resistance state and increases its volt-
age drop so that I
O
= I
CS
. The silicon temperature
of the D.U.T. increases rapidly up to the thermal
protection threshold value (Lim) and such pro-
tection tries to cut-off the output DMOS. The turn-
off of theoutput forcesthe demagnetizationcycle,
that discharges the energy of the inductive load
(to V
S
) through the device.
The higher clamped current value (I
SC
) will pro-
duce, during the demagnetization, more stress
conditionsbecause of both:
- The higher energy in the magneticload
- The higher peak power (1)
During the ”on” state the power (P
don
) on the
D.U.T (see the 225msec. interval in fig.3) is de-
fined by the I
O
(I
SC
) and R
l
values. The chip tem-
perature rapidly increases and reaches the upper
thermal protection threshold value (Lim); at that
moment the protection is triggered on, inducing
the attempt of switch-off, the associated demag-
netization
phase
(some
225msec. interval),and finallythe switch-off.
The D.U.T. starts then to cool down stayingin the
off-state, until the chip temperaturegoes down to
lower thermal threshold value (Lim-Hy). When
lower limit (Lim-Hy) value is underpassed, the
thermal protectioncircuit withdraws itself, the chip
resumesits normal functionsand restarts another
cycle. In facts its input has been connected per-
manently to a voltage level of more than 2V,
meaning a continuos request for conduction. A
new overload cycle is so started, and a periodic
repetition of:
load charging
currentlimitation
overtemperatureand demagnetization
coolingdown in the off state .
It can be noted that, for given thermal parameters
(Z
th
, Thermal protection levels and hysteresis),
differences in P
don
affect only the ”T
ON
” and
”T
OFF
” duration and ratio of such periodic repeti-
tion.
The Minidip device (”DP” suffix) suffers heavier
stress conditions than the SIP9 option (”SP” suf-
fix) because of the package differences (Minidip
vs. SIP9 involveshigher thermal gradients).
50msec.
after
the
Note(1
)
During the demagnetization phase , the power
dissipated inside the I.P.S. Chip is: I
O
(t) * V
CL
-I
O
(t) decays to zero from I
SC
.
-V
CL
is set bythe I.P.S.itself to about 50V
Figure2:
Inductive Load EquivalentCircuit
and DemagnetizationCycle Waveforms
Io
APPLICATION NOTE
2/6