參數(shù)資料
型號(hào): TEA7063DP
廠商: 意法半導(dǎo)體
英文描述: SPEECH CIRCUIT WITH POWER MANAGEMENT
中文描述: 語(yǔ)音電路電源管理
文件頁(yè)數(shù): 8/15頁(yè)
文件大?。?/td> 228K
代理商: TEA7063DP
3. RECEIVE CHAIN
3.1 A.G.C. In Receive
As described for the transmission chain, also the
receiving gains Gr, from pins 1 and 2 to pin 20,
have a reduction of 6dB when Iline moves from
ILL to ILS (see also paragr.4).
3.2 SidetoneCompensation
The circuit is provided with a double anti-sidetone
network to optimize both at longand short lines.
In case double antisidetone network is not re-
quested by the application needs, pins 1 and 2
can be connected to each other and 5 external
passive components can be saved (ZALL and
ZRL).
Before entering pins 1 and 2, the received signal
is areduced by the two attenatingnetworks:
- ZALL/ZRL to pin 1 for long lines sidetone com-
pensation,
- ZALS/ZRS to pin 2 for short lines sidetone com-
pensation.
ZRL and ZRSdefine the totalreceive gains:
a)V20
V16
=
G
r
ZRL
ZRL
+
ZALLfor
long
lines
b)
V20
V16
= (
G
r
6dB
)
ZRS
ZRS
+
ZALSfor short lines
ZALL and ZALS define the sidetone compensa-
tion of the circuit.
The equivalent balancing impedance is given by
the formula:
ZAL = K
ZALS + (1 - K)
ZALL
where:
-K = 0 at I
LINE
= ILL or lower (long line)
-K varies linearly from 0 to 1 with Iline between
ILL and ILS
-K = 1 at I
LINE
= ILS or higher (short line)..
Calculations to define ZALL and ZALS are:
a)
ZALL=70
R5
Z
line
(
long
)
Z
ext
Z
int
Z
out
b)
ZALL=70
R5
Z
line
(
short
)
Z
ext
Z
int
Z
out
where:
- Z
ext
= R6//C4//(Zelectret)(at pin13)
- Z
int
= 10K
//8.5nF (internal impedance)
- Z
out
= 10.65
Z4(at pin 3; see paragr. 2.2)
- Zline (short) and (long) are the impedances of
the line at minimum and naximum line lenght
- R5 = 5.1K
±
1% (typically)
Z
out
Z
out
3.3AC Impedance
The total AC impedance of the circuit to the line
is:
ZAC = Zout//Zint//Zext (ZALS, ZALL >>ZAC)
3.4 Receive Mute
(and confidencelevel)
When the receive channel is muted (Vpin 14 >
2.7V)the receivegain is reducedof 60dBminimum.
Figure6
TEA7063
8/15
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