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參數(shù)資料
| 型號： | TFDS5500-TR3 |
| 廠商： | VISHAY TELEFUNKEN |
| 元件分類： | 搖控器 |
| 英文描述： | TRANSMITTER/RECEIVER IC, DMA8 |
| 封裝： | 13 X 5.30 MM, 5.95 MM HEIGHT, STAGGERED, SMT-8 |
| 文件頁數(shù)： | 11/13頁 |
| 文件大?。?/td> | 257K |
| 代理商： | TFDS5500-TR3 |
TFDU5100/TFDS5500/TFDT5500
Vishay Telefunken
Not for new design
Rev. 1, 01-Apr-99
7
www.vishay.de
FaxBack +1-408-970-5600
Document Number 82516
Mode Switching
The TFDU5100, TFDS5500 and TFDT5500 do not
power on with a default mode, therefore the data trans-
fer rate has to be set by a programming sequence
using the Txd and SD/Mode inputs as described below
or selected by setting the mode pin. The Mode pin can
be used to statically set the mode (Mode pin: LOW:
SIR, High: 0.576 Mbit/s to 1.152 Mbit/s). When using
the Mode pin, the standby current may increase to
about 50
mA to 60 mA when high or low. If not used or
in standby mode, the mode input should float to mini-
mize standby current. The low frequency mode covers
speeds up to 115.2 kbit/s. Signals with higher data
rates should be detected in the high frequency mode.
Lower frequency data can also be received in the high
frequency mode but with reduced sensitivity. To switch
the transceivers from low frequency mode to the
1.152 Mbit/s mode and vice versa, the programming
sequences described below are required.
Txd
SD/Mode
ts
th
50%
High : MIR
Low : SIR
50%
14920
Figure 5. Mode Switching Timing Diagram
Setting to the High Bandwidth Mode
(0.576 Mbit/s to 1.152 Mbit/s)
1. Set SD/MODE input to logic “HIGH”.
2. Set Txd input to logic “HIGH”. Wait ts ≥ 200 ns.
3. Set SD/MODE to logic “LOW” (this negative edge
latches state of Txd, which determines speed
setting).
4. After waiting th ≥ 200 ns Txd can be set to logic
“LOW”. The hold time of Txd is limited by the
maximum allowed pulse length.
Txd is now enabled as normal Txd input for the high
bandwidth mode.
Setting to the Lower Bandwidth Mode
(2.4 kbit/s to 115.2 kbit/s)
1. Set SD/MODE input to logic “HIGH”.
2. Set Txd input to logic “LOW”. Wait ts ≥ 200 ns.
3. Set SD/MODE to logic “LOW” (this negative edge
latches state of Txd, which determines speed
setting).
4. Txd must be held for th ≥ 200 ns.
Txd is now enabled as normal Txd input for the lower
bandwidth mode.
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| TFDT5500-TR3 | TRANSMITTER/RECEIVER IC, SMA8 |
| TFDU5100-TR3 | TRANSMITTER/RECEIVER IC, SMA8 |
| TFDU5100-TT3 | TRANSMITTER/RECEIVER IC, SMA8 |
| TFDS5500-TR3 | INFRARED, TRANSMITTER/RECEIVER IC, SMA8 |
| TFDT5500-TR3 | INFRARED, TRANSMITTER/RECEIVER IC, SMA8 |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| TFDS6401 | 制造商:VISHAY 制造商全稱:Vishay Siliconix 功能描述:Fast Infrared Transceiver Module Family (FIR, 4 Mbit/s) for 2.6 V to 5.5 V Operation |
| TFDS6401-TR3 | 制造商:VISHAY 制造商全稱:Vishay Siliconix 功能描述:Fast Infrared Transceiver Module Family (FIR, 4 Mbit/s) for 2.6 V to 5.5 V Operation |
| TFDS6402 | 制造商:VISHAY 制造商全稱:Vishay Siliconix 功能描述:Fast Infrared Transceiver Module Family (FIR, 4 Mbit/s) for 2.6 V to 5.5 V Operation |
| TFDS6402-TR3 | 制造商:VISHAY 制造商全稱:Vishay Siliconix 功能描述:Fast Infrared Transceiver Module Family (FIR, 4 Mbit/s) for 2.6 V to 5.5 V Operation |
| TFDS6500E | 制造商:VISHAY 制造商全稱:Vishay Siliconix 功能描述:2.7-5.5V Fast Infrared Transceiver Module Family |
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