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| 型號： | TH8082 |
| 廠商： | Electronic Theatre Controls, Inc. |
| 英文描述： | Single LIN Bus Transceiver |
| 中文描述： | 單LIN總線收發(fā)器 |
| 文件頁數(shù)： | 7/14頁 |
| 文件大?。?/td> | 175K |
| 代理商： | TH8082 |
T H8082
Single LIN Transceiver
www.melexis.com
Page 7
Data Sheet Rev 1.0 June 2001
Dynamic Characteristics
All dynamic values of the table below refer to the test-schematic schown in Figure - Timing Diagram
6V
≤
V
S
≤
18V, -40°C
≤
T
A
≤
125°C, unless otherwise specified
Parameter
Symbol
Conditions
Min
Typ
Max
Unit
Slew rate falling edge
t
SRF
80% < VBUS < 20% ,
minimum & maximum bus
load
-3
-2
-1
V/μs
Slew rate rising edge
t
SRR
20% < VBUS < 80% ,
minimum bus load
[1]
1
2
3
V/μs
Propagation delay transmitter
( TxD->BUS)
t
trans_pdf
TxD high to low transition
[2]
4
μs
Propagation delay transmitter
( TxD->BUS)
t
trans_pdr
TxD low to high transition
[2]
4
μs
Propagation delay transmitter
symmetry
t
trans_sym
Calculate t
trans_pdf
- t
trans_pdr
-2
2
μs
Propagation delay receiver
( BUS->RxD)
t
rec_pdf
BUS recessive to dominant
[2]
6
μs
Propagation delay receiver
( BUS->RxD)
t
rec_pdr
BUS dominant to recessive
[2]
6
μs
Propagation delay receiver
symmetry
t
rec_sym
Calculate t
trans_pdf
- t
trans_pdr
-2
2
μs
EN debauncing time
t
en_deb
Normal to sleep mode
]
10
20
40
μs
Receiver debounce time
t
rec_deb
BUS rising & falling edge
[3]
1.2
3.1
μs
Wake-up filter time
t
wu
BUS rising & falling edge
[4]
25
90
μs
______________________________
[1]
Minimum slew rate of the rising edge is determined by the network time constant
[2]
See timing diagram figure 3
[3]
See timing diagram figure 4
[4]
See timing diagram figure 5
Static Characteristics (continued)
Parameter
Low level output voltage
V
ol_rxd
I
RxD
= 1.25mA
0.9
V
High level output voltage
V
oh_rxd
I
RxD
= -250μA
V
CC
-0.9
V
PIN INH
High level output voltage
V
oh_INH
I
RxD
= -180μA
V
S
-0.8V V
S
-0.5V
V
Leakage current
V
INH_lk
EN = L, V
INH
= 0V
-5
5
μA
Thermal protection
Thermal shutdown
T
sd
150
180
°C
Hysteresis
T
hys
5
25
°C
PIN RXD
Symbol
Conditions
Min
Typ
Max
Unit
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