參數(shù)資料
型號(hào): THS1040EVM
廠商: Texas Instruments, Inc.
英文描述: Evaluation Module for the THS1040 10-Bit ADC(10位模數(shù)轉(zhuǎn)換器THS1040評(píng)估模塊)
中文描述: 評(píng)估模塊的THS1040 10位ADC(10位模數(shù)轉(zhuǎn)換器THS1040評(píng)估模塊)
文件頁數(shù): 20/31頁
文件大?。?/td> 433K
代理商: THS1040EVM
Circuit Function
3-3
Circuit Description
Table 3
1.THS1040 Jumper Settings for Control Inputs
Jumper
Function
Location: Pins 1–2
Location: Pins 2–3
W3
Power down select
Operate mode
Power down mode
W4
Output enable select
Data bus 3-state
Data bus enabled
The THS1041 has three internal control registers that put the device into vari-
ous modes of operation (see data sheet). Writing to the registers is accom-
plished on the EVM by using the two banks of DIL switches S2 and S3 and re-
set switch S1. A write operation to the THS1041 is performed as follows:
1)
Set the DIL switches to the value to be programmed into the THS1041 reg-
isters. Each individual DIL switch is referenced to a register bit in either
clamp register #1, clamp register #2, or the control register. DAC0 DIL
switch through DAC7 DIL switch refers to bits 0
7 of clamp register #1.
DAC8 and DAC9 DIL switches refer to bits 0 and 1 of clamp register #2.
The DIL labels on S3 map directly to the control register. A DIL switch in
the ON position represents a logic 1. Register bits 9 and 8 are automatical-
ly set by the PLD during programming.
2)
Press and release the push button switch S1. All THS1041 registers are
now programmed with the DIL switch values by the PLD.
Note:
After first application of power, the values of the DIL switches are automati-
cally programmed into the THS1041 registers.
3.1.1.6
Clamp Interface
The THS1041 has a built-in clamp amplifier whose clamp input level can be
driven from an external dc source (SMA connector J6) or from an internal high-
precision 10-bit digital clamp level DAC, programmable via an internal clamp
register. The clamp function is enabled by inputting a logic high level (AV
DD
)
input to SMA connector J5. The internal register is written to by the DIL
switches and the PLD on the EVM. To enable the clamp interface, the following
THS1041 internal control register bits and EVM jumpers must be configured
as follows:
Table 3
2.THS1041 Internal Control Register Bits and EVM Jumpers
Clampout Source
Internal Register
Bit CLINT
Internal Register
Bit CLDIS
Jumper Table (Connection)
Clampin pin
0
0
SJP9 pin 1
2, SJP10 pin 1
SJP9 in 1 2, SJP10 in 1 2, W7 OUT, W8
OUT, W9 IN or W8 IN, W9 OUT
Internal DAC
1
0
3.1.1.7
Programmable Gain Amplifier (PGA)
The THS1041 has a built-in 3-bit programmable gain amplifier operated by the
internal control register. The gain range is from 0.5 to 4.0. See the data sheet
for control register values used to select available gain settings.
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