參數(shù)資料
型號： THS1041IPWG4
廠商： TEXAS INSTRUMENTS INC
元件分類： ADC
英文描述： 1-CH 10-BIT PROPRIETARY METHOD ADC, PARALLEL ACCESS, PDSO28
封裝： GREEN, PLASTIC, TSSOP-28
文件頁數(shù)： 18/41頁
文件大?。?/td> 810K
代理商： THS1041IPWG4
THS1041
SLAS289C OCTOBER 2001 REVISED OCTOBER 2004
25
www.ti.com
PRINCIPLES OF OPERATION
clamp operation (continued)
Line Sync
Black
Level
Video at AIN
CLAMP
Figure 39. Example Waveforms for Line-Clamping to a Video Input Black Level
clamp DAC output voltage range and limits
When using the internal clamp DAC, the user must ensure that the desired dc clamp level at AIN+/ lies within
the voltage range VREFB to VREFT. This is because the clamp DAC voltage is constrained to lie within this range
VREFB to VREFT. Specifically:
VDAC
+ V
REFB ) (VREFT * VREFB)
(0.006
) 0.988
(DAC code) 1024)
DAC codes can range from 0 to 1023. Figure 40 graphically shows the clamp DAC output voltage versus the
DAC code.
VDAC
0
1023
VREFB + 0.006(VREFTVREFB)
VREFB + 0.987(VREFTVREFB)
DAC Code
VREFT
VREFB
Figure 40. Clamp DAC Output Voltage Versus DAC Register Code Value
If the desired dc level at AIN+/ does not lie within the voltage range VREFT to VREFB, then either the CLAMPIN
pin can be used instead to provide a suitable reference voltage, or it may be possible to redesign the application
to move the AIN+/ input range into the CLAMP DAC voltage range.
(13)
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相關代理商/技術參數(shù)
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