參數(shù)資料
型號: THS12082QDAR
廠商: TEXAS INSTRUMENTS INC
元件分類: ADC
英文描述: 2-CH 12-BIT PROPRIETARY METHOD ADC, PARALLEL ACCESS, PDSO32
封裝: PLASTIC, TSSOP-32
文件頁數(shù): 19/42頁
文件大小: 840K
代理商: THS12082QDAR
THS12082
12-BIT, 8 MSPS, SIMULTANEOUS SAMPLING ANALOG-TO-DIGITAL CONVERTERS
SLAS271B – MAY 2000 – REVISED DECEMBER 2002
26
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
interfacing the THS12082 to the TMS320C6201 DSP
The following application circuit shows an interface of the THS12082 to the TMS320C6201. The read (using
RD, RD-controlled) and write timings (using WR, WR-controlled) shown before are valid for this specific
interface.
CS0
CS1
RD
WR
DATA_AV
DATA
CONV_CLK
THS12082–1
CS0
CS1
RD
WR
DATA_AV
DATA
CONV_CLK
THS12082–2
TMS320C6201
CE1
EA20
ARE
AWE
EXT_INT6
DATA
TOUT1
TOUT2
EA21
EXT_INT7
analog input configuration and reference voltage
The THS12082 features two analog input channels. These can be configured for either single-ended or
differential operation. Best performance is achieved in differential mode. Figure 15 shows a simplified model,
where a single-ended configuration for channel AINP is selected. The reference voltages for the ADC itself are
VREFP and VREFM (either internal or external reference voltage). The analog input voltage range goes from
VREFM to VREFP. This means that VREFM defines the minimum voltage, which can be applied to the ADC. VREFP
defines the maximum voltage, which can be applied to the ADC. The internal reference source provides the
voltage VREFM of 1.5 V and the voltage VREFP of 3.5 V. The resulting analog input voltage swing of 2 V can be
expressed by:
V
REFM v
AINP
v V
REFP
12-Bit
ADC
VREFP
VREFM
AINP
Figure 15. Single-Ended Input Stage
(1)
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