- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄385925 > THS3110EVM (Texas Instruments, Inc.) THS3110 Evalutation Module(THS3110評估板) PDF資料下載
參數(shù)資料
| 型號： | THS3110EVM |
| 廠商： | Texas Instruments, Inc. |
| 英文描述： | THS3110 Evalutation Module(THS3110評估板) |
| 中文描述： | THS3110 Evalutation模塊（THS3110評估板） |
| 文件頁數(shù)： | 20/27頁 |
| 文件大?。?/td> | 880K |
| 代理商： | THS3110EVM |
第1頁第2頁第3頁第4頁第5頁第6頁第7頁第8頁第9頁第10頁第11頁第12頁第13頁第14頁第15頁第16頁第17頁第18頁第19頁當前第20頁第21頁第22頁第23頁第24頁第25頁第26頁第27頁
www.ti.com
DIE
Side View (a)
DIE
End View (b)
Thermal
Pad
Bottom View (c)
THS3110, THS3111
SLOS422A–SEPTEMBER 2003–REVISED NOVEMBER 2003
Connections to other wideband devices on the
board may be made with short direct traces or
through onboard transmission lines. For short
connections, consider the trace and the input to
the next device as a lumped capacitive load.
Relatively wide traces (50 mils to 100 mils)
should be used, preferably with ground and
power planes opened up around them. Estimate
the total capacitive load and determine if isolation
resistors on the outputs are necessary. Low
parasitic capacitive loads (< 4 pF) may not need
an R
S
since the THS3110 and THS3111 are
nominally compensated to operate with a 2-pF
parasitic load. Higher parasitic capacitive loads
without an RS are allowed as the signal gain
increases (increasing the unloaded phase mar-
gin). If a long trace is required, and the 6-dB
signal loss intrinsic to a doubly-terminated trans-
mission line is acceptable, implement a matched
impedance transmission line using microstrip or
stripline techniques (consult an ECL design hand-
book for microstrip and stripline layout tech-
niques). A 50-
environment is not necessary
onboard, and in fact, a higher impedance en-
vironment improves distortion as shown in the
distortion versus load plots. With a characteristic
board trace impedance based on board material
and trace dimensions, a matching series resistor
into the trace from the output of the THS3110 /
THS3111 is used as well as a terminating shunt
resistor at the input of the destination device.
Remember also that the terminating impedance is
the parallel combination of the shunt resistor and
the input impedance of the destination device:
this total effective impedance should be set to
match the trace impedance. If the 6-dB attenu-
ation of a doubly terminated transmission line is
unacceptable,
a
long
series-terminated at the source end only. Treat
the trace as a capacitive load in this case. This
does not preserve signal integrity as well as a
doubly-terminated line. If the input impedance of
the destination device is low, there is some signal
attenuation due to the voltage divider formed by
the series output into the terminating impedance.
Socketing a high speed part like the THS3110
and THS3111 is not recommended. The ad-
ditional lead length and pin-to-pin capacitance
introduced by the socket can create an extremely
troublesome parasitic network which can make it
almost impossible to achieve a smooth, stable
frequency response. Best results are obtained by
soldering the THS3110 / THS3111 parts directly
onto the board.
PowerPAD DESIGN CONSIDERATIONS
The THS3110 and THS3111 are available in a
thermally-enhanced PowerPAD family of packages.
These packages are constructed using a downset
leadframe upon which the die is mounted [see
Figure 63(a) and Figure 63(b)]. This arrangement
results in the lead frame being exposed as a thermal
pad on the underside of the package [see Fig-
ure 63(c)]. Because this thermal pad has direct
thermal contact with the die, excellent thermal per-
formance can be achieved by providing a good
thermal path away from the thermal pad. Note that
devices such as the THS311x have no electrical
connection between the PowerPAD and the die.
The PowerPAD package allows for both assembly
and thermal management in one manufacturing oper-
ation. During the surface-mount solder operation
(when the leads are being soldered), the thermal pad
can also be soldered to a copper area underneath the
package. Through the use of thermal paths within this
copper area, heat can be conducted away from the
package into either a ground plane or other heat
dissipating device.
The PowerPAD package represents a breakthrough
in combining the small area and ease of assembly of
surface mount with the, heretofore, awkward mechan-
ical methods of heatsinking.
trace
can
be
Figure 63. Views of Thermal Enhanced Package
Although there are many ways to properly heatsink
the PowerPAD package, the following steps illustrate
the recommended approach.
20
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| THS3202EVM | THS3202 Evalutation Module(THS3202評估板) |
| THS4120EVM | THS4120 Evalutation Module(THS4120評估板) |
| THS4121EVM | THS4121 Evalutation Module(THS4121評估板) |
| THS4131EVM | THS4131 Evalutation Module(THS4131評估板) |
| THS4211EVM | THS4211 Evalutation Module(THS4211評估板) |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| THS3110ID | 功能描述:高速運算放大器 Sngl Lo-Noise Hi-Vlt Current-Feedback RoHS:否 制造商:Texas Instruments 通道數(shù)量:1 電壓增益 dB:116 dB 輸入補償電壓:0.5 mV 轉(zhuǎn)換速度:55 V/us 工作電源電壓:36 V 電源電流:7.5 mA 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:SOIC-8 封裝:Tube |
| THS3110IDG4 | 功能描述:高速運算放大器 Sngl Lo-Noise Hi-Vlt Current-Feedback RoHS:否 制造商:Texas Instruments 通道數(shù)量:1 電壓增益 dB:116 dB 輸入補償電壓:0.5 mV 轉(zhuǎn)換速度:55 V/us 工作電源電壓:36 V 電源電流:7.5 mA 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:SOIC-8 封裝:Tube |
| THS3110IDGN | 功能描述:高速運算放大器 Sngl Lo-Noise Hi-Vlt Current-Feedback RoHS:否 制造商:Texas Instruments 通道數(shù)量:1 電壓增益 dB:116 dB 輸入補償電壓:0.5 mV 轉(zhuǎn)換速度:55 V/us 工作電源電壓:36 V 電源電流:7.5 mA 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:SOIC-8 封裝:Tube |
| THS3110IDGNG4 | 功能描述:高速運算放大器 Sngl Lo-Noise Hi-Vlt Current-Feedback RoHS:否 制造商:Texas Instruments 通道數(shù)量:1 電壓增益 dB:116 dB 輸入補償電壓:0.5 mV 轉(zhuǎn)換速度:55 V/us 工作電源電壓:36 V 電源電流:7.5 mA 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:SOIC-8 封裝:Tube |
| THS3110IDGNR | 功能描述:高速運算放大器 Sngl Lo-Noise Hi-Vlt Current-Feedback RoHS:否 制造商:Texas Instruments 通道數(shù)量:1 電壓增益 dB:116 dB 輸入補償電壓:0.5 mV 轉(zhuǎn)換速度:55 V/us 工作電源電壓:36 V 電源電流:7.5 mA 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:SOIC-8 封裝:Tube |
發(fā)布緊急采購，3分鐘左右您將得到回復。