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參數資料
| 型號： | THS3202EVM |
| 廠商： | Texas Instruments, Inc. |
| 英文描述： | THS3202 Evalutation Module(THS3202評估板) |
| 中文描述： | THS3202 Evalutation模塊（THS3202評估板） |
| 文件頁數： | 9/17頁 |
| 文件大?。?/td> | 457K |
| 代理商： | THS3202EVM |
1-2
VO
VI
1
R6
R1
R2
R4
50
R4
50
R5
0.911
(2)
EMV Channel 2:
The default configuration for EVM channel 2 is designed to provide a voltage
gain of +1. This voltage gain is the ratio of the voltage at the output pin of the
amplifier (pin 7) to the voltage at the J5 input. The value of feedback resistor
R7 is chosen to be 619
. This gives optimum frequency response and stability
at a gain of +1.
When using the default configuration, the noninverting gain of the EVM
channel 2 amplifier is affected by the same slight gain error caused by R12,
as shown in Equation 1 and indicated in following equation.
VO
VI
R12
50
50
R12
R11
0.474
(3)
THS3202 dual high-speed operational amplifier EVM features include:
Wide operating supply voltage range: dual supply
±
3 V to dual supply
±
7.5 V operation (see the device data sheet). Single supply operation is
obtained by connecting both J6 (GND) and J7 (V
S
-) to ground.
Convenient GND test point (TP1)
Power supply ripple rejection provided by inductors FB1 and FB2,
followed by tantalum capacitors C5 and C6
Decoupling capacitors C7 and C8 are populated with 0.1
μ
F, and
capacitors C9 and C10 are populated with 100 pF
—
users design the final
decoupling in accordance with SLOA069
Nominal 50-
input impedance for each of the configured inputs (V1in
–
,
V1in+ and V2in+. Termination can be configured according to the
application requirement.
A good example of high-speed amplifier PCB design and layout. Also see
High-Speed Amplifier PCB Layout Tips, SLOA102.
50-
series matching resistors (R5 and R11)
453-
resistor to ground provides minimum load through 500
on each
amplifier
PowerPAD heatsinking capability
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