參數(shù)資料
型號(hào)： THS4601IDRG4
廠(chǎng)商： TEXAS INSTRUMENTS INC
元件分類(lèi)： 音頻／視頻放大
英文描述： 1 CHANNEL, VIDEO AMPLIFIER, PDSO8
封裝： PLASTIC, MS-012AA, SOIC-8
文件頁(yè)數(shù)： 5/35頁(yè)
文件大?。?/td> 984K
代理商： THS4601IDRG4
THS4601
SLOS388B OCTOBER 2001 REVISED JUNE 2002
13
www.ti.com
APPLICATION INFORMATION
designing the transimpedance circuit (continued)
As indicated, the current source typically sets the requirements for gain, speed, and dynamic range of the
amplifier. For a given amplifier and source combination, achievable performance is dictated by the following
parameters: the amplifier’s gain-bandwidth product, the amplifier’s input capacitance, the source capacitance,
the transimpedance gain, the amplifier’s slew rate, and the amplifier’s output swing. From this information, the
optimal performance of a transimpedance circuit using a given amplifier can be determined. Optimal is defined
here as providing the required transimpedance gain with a maximally flat frequency response.
For the circuit shown in Figure 26, all but one of the design parameters is known; the feedback capacitor must
be determined. Proper selection of the feedback capacitor prevents an unstable design, controls pulse
response characteristics, provides maximally flat transimpedance bandwidth, and limits broadband integrated
noise. The maximally flat frequency response results with CF calculated as shown in equation 1, where CF is
the feedback capacitor, RF is the feedback resistor, CS is the total source capacitance (including amplifier input
capacitance and parasitic capacitance at the inverting node), and GBP is the gain-bandwidth product of the
amplifier in hertz.
C
F +
1
pR
F
GBP
)
1
pR
F
GBP
2
)
4C
S
pR
F
GBP
2
Once the optimal feedback capacitor has been selected, the transimpedance bandwidth can be calculated with
equation 2.
F
–3 dB +
GBP
2
pR
F CS )
C
F
_
+
CIDIFF
CICM
CP
RF
CF
CD
IDIODE
NOTE: The total source capacitance is the sum of several distinct capacitances.
Cs = CICM + CIDIFF + CP + CD
Where: CICM is the common-mode input capacitance.
CIDIFF is the differential input capacitance.
CD is the diode capacitance.
CP is parasitic capacitance at the inverting node.
Figure 27. Transimpedance Analysis Circuit
(1)
(2)
相關(guān)PDF資料
PDF描述
THS5641AIDW PARALLEL, 8 BITS INPUT LOADING, 0.035 us SETTLING TIME, 8-BIT DAC, PDSO28
THS5641AIPW PARALLEL, 8 BITS INPUT LOADING, 0.035 us SETTLING TIME, 8-BIT DAC, PDSO28
THS5641AIPWG4 PARALLEL, 8 BITS INPUT LOADING, 0.035 us SETTLING TIME, 8-BIT DAC, PDSO28
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