參數(shù)資料
型號(hào)： THS8134BCPHP
廠商： TEXAS INSTRUMENTS INC
元件分類： DAC
英文描述： PARALLEL, 8 BITS INPUT LOADING, 0.005 us SETTLING TIME, 8-BIT DAC, PQFP48
封裝： PLASTIC, HTQFP-48
文件頁(yè)數(shù)： 24/27頁(yè)
文件大?。?/td> 553K
代理商： THS8134BCPHP
THS8134, THS8134A, THS8134B
TRIPLE 8BIT, 80 MSPS VIDEO D/A CONVERTER
WITH TRILEVEL SYNC GENERATION
SLVS205D MAY 1999 REVISED MARCH 2000
6
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
POST OFFICE BOX 1443
HOUSTON, TEXAS 772511443
Table 2. INS3_INT/M2_INT Selection on M2
LAST
EVENT ON
SYNC
SYNC_T
M1
M2
(see Note 2)
DESCRIPTION
H
→L
L or H
X
INS3_INT
Sync insertion active: SYNC low enables sync generation on 1 (INS3_INT=L) or all 3
(INS3_INT=H) DAC outputs. SYNC_T determines the sync polarity.
L
→H
X
M2_INT
Device mode programming active: The DAC outputs reflect the DAC inputs
(BLANK=H) or are forced to the blanking level (BLANK=L). M2 is interpreted according
to Table 1.
X = Don’t care
NOTE 2: M1 and M2 start configuring the device as soon as they are interpreted, which is continuously for M1 (static pin) or on the second rising
edge on CLK after a transition on SYNC for M2. M2 is interpreted as either INS3_INT or M2_INT, as shown in Table 2.
programming example
Configuration of the device will normally be static in a given application. If M2_INT and INS3_INT need to be
both low or high, the M2 pin is simply tied low or high. If M2_INT and INS3_INT need to have different levels,
these can be easily derived from the signal on the SYNC pin, as shown in Table 3 and Figure 2.
Table 3. Generating M2 From SYNC
In order to have:
Apply to M2:
M2_INT
INS3_INT
Apply to M2:
L
H
...SYNC delayed by 2 CLK periods
H
L
...inverted SYNC delayed by 2 CLK periods
The input formats and latencies are shown in Figures 35 for each operation mode.
CLK
SYNC
M2
[=SYNC_delayed]
INS3_INT
M2_INT
M2
[=NOT SYNC_delayed]
INS3_INT
M2_INT
if (M2 = SYNC_delayed)
M2_INT = L and INS3_INT = H)
if (M2 = NOT SYNC_delayed)
M2_INT = H and INS3_INT = L)
Figure 2. Generating INS3_INT and M2_INT from M2
相關(guān)PDF資料
PDF描述
THS8134CPHP PARALLEL, 8 BITS INPUT LOADING, 0.005 us SETTLING TIME, 8-BIT DAC, PQFP48
THS8134ACPHP PARALLEL, 8 BITS INPUT LOADING, 0.005 us SETTLING TIME, 8-BIT DAC, PQFP48
THS8135-240IPHP PARALLEL, WORD INPUT LOADING, 10-BIT DAC, PQFP48
THS8135-80CPHP PARALLEL, WORD INPUT LOADING, 10-BIT DAC, PQFP48
THS8135-80IPHP PARALLEL, WORD INPUT LOADING, 10-BIT DAC, PQFP48
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
THS8134BCPHP 制造商:Texas Instruments 功能描述:8BIT DAC 80MSPS TRIPLE SMD 8134
THS8134BCPHPG4 功能描述:數(shù)字化視頻/模擬轉(zhuǎn)換器集成電路 8-BIT 80MSPS TRIPLE DAC RoHS:否 制造商:Texas Instruments 轉(zhuǎn)換器數(shù)量:3 輸出類型:Current 轉(zhuǎn)換速率:180 MSPs 分辨率:10 bit 接口類型:Parallel 電壓參考:Internal or External 積分非線性:- 2.5 LSB, 1.5 LSB 電源電壓-最大:3.6 V 電源電壓-最小:3 V 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝 / 箱體:HTQFP 封裝:Tray
THS8134BTQFP 制造商:TI 制造商全稱:Texas Instruments 功能描述:TRIPLE 8-BIT, 80 MSPS VIDEO D/A CONVERTER WITH TRI-LEVEL SYNC GENERATION
THS8134CPHP 制造商:Rochester Electronics LLC 功能描述:- Bulk
THS8134TQFP 制造商:TI 制造商全稱:Texas Instruments 功能描述:TRIPLE 8-BIT, 80 MSPS VIDEO D/A CONVERTER WITH TRI-LEVEL SYNC GENERATION
發(fā)布緊急采購(gòu)，3分鐘左右您將得到回復(fù)。

采購(gòu)需求

(若只采購(gòu)一條型號(hào)，填寫一行即可)

發(fā)布成功！您可以繼續(xù)發(fā)布采購(gòu)。也可以進(jìn)入我的后臺(tái)，查看報(bào)價(jià)

發(fā)布成功！您可以繼續(xù)發(fā)布采購(gòu)。也可以進(jìn)入我的后臺(tái)，查看報(bào)價(jià)

*型號(hào) *數(shù)量 廠商 批號(hào) 封裝
添加更多采購(gòu)

我的聯(lián)系方式

*
*
*