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參數(shù)資料
| 型號： | THS8134BTQFP |
| 廠商： | Texas Instruments, Inc. |
| 英文描述： | TRIPLE 8-BIT, 80 MSPS VIDEO D/A CONVERTER WITH TRI-LEVEL SYNC GENERATION |
| 中文描述： | 三路8位，80 MSPS的視頻D /與Tri轉(zhuǎn)爐電平同步發(fā)電 |
| 文件頁數(shù)： | 2/24頁 |
| 文件大?。?/td> | 346K |
| 代理商： | THS8134BTQFP |
THS8134, THS8134A, THS8134B
TRIPLE 8-BIT, 80 MSPS VIDEO D/A CONVERTER
WITH TRI-LEVEL SYNC GENERATION
SLVS205D – MAY 1999 – REVISED MARCH 2000
2
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
description (continued)
Finally the input format can be either 3
×
8 bit 4:4:4, 2
×
8 bit 4:2:2, or 1
×
8 bit 4:2:2. This enables a direct interface
to a wide range of video DSP/ASICs including parts generating ITU-BT.656 formatted output data.
AVAILABLE OPTIONS
TA
PACKAGE
TQFP-48 PowerPAD
THS8134CPHP
THS8134ACPHP
THS8134BCPHP
0
°
C to 70
°
C
In the THS8134CPHP, the KIMBALmaximum specification is
assured over full temperature range and the KIMBAL(SYNC)
maximum specification is assured at 25
°
C. The position of
the blanking level is as shown in Table 1.
In the THS8134ACPHP and the THS8134BCPHP, both the
KIMBALmaximum specification and the KIMBAL(SYNC)
maximum specification are assured over the full temperature
range. The position of the blanking level is as shown in
Table 1.
Terminal Functions
TERMINAL
I/O
DESCRIPTION
NAME
ABPb
PIN
45
O
Analog red, green and blue respectively Pr, Y and Pb current outputs, capable of directly driving a doubly
terminated 75-
coaxial cable.
AGY
41
O
ARPr
43
O
AVDD
AVSS
BLANK
40,44
I
Analog power supply (5 V
±
10%). All AVDD terminals must be connected.
Analog ground
42,46
I
23
I
Blanking control input, active low. A rising edge on CLK latches BLANK. When asserted, the ARPr, AGY and
ABPb outputs are driven to the blanking level, irrespective of the value on the data inputs. SYNC takes
precedence over BLANK, so asserting SYNC (low) while BLANK is active (low) will result in sync generation.
BPb0–BPb7
8–1
I
Blue or Pb pixel data input bus. Index 0 denotes the least significant bit. Refer to functional description for
different operating modes.
CLK
26
I
Clock input. A rising edge on CLK latches RPr0-7, GY0-7, BPb0-7, BLANK, SYNC, and SYNC_T. The M2 input is
latched by a rising edge on CLK also, but only when additional conditions are satisfied, as explained in its
terminal description.
Compensation terminal. A 0.1
μ
F capacitor must be connected between COMP and AVDD.
Digital power supply (3-V to 5-V range)
COMP
39
O
DVDD
DVSS
FSADJ
12
I
11
I
Digital ground
38
I
Full-scale adjust control. The full-scale current drive on each of the output channels is determined by the value of
a resistor RFS connected between this terminal and AVSS. The nominal value of RFS is 430
, corresponding to
26.67 mA full-scale current. The relationship between RFS and the full-scale current level for each operation
mode is explained in the functional description.
GY0–GY7
34–27
I
Green or Y pixel data input bus. Index 0 denotes the least significant bit. Refer to functional description for
different operating modes.
M1
47
I
Operation mode control 1. M1 is directly interpreted by the device (it is not latched by CLK). M1 configures device
according to Table 1.
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| THS8134CPHP | 制造商:Rochester Electronics LLC 功能描述:- Bulk |
| THS8134TQFP | 制造商:TI 制造商全稱:Texas Instruments 功能描述:TRIPLE 8-BIT, 80 MSPS VIDEO D/A CONVERTER WITH TRI-LEVEL SYNC GENERATION |
| THS8135 | 制造商:TI 制造商全稱:Texas Instruments 功能描述:TRIPLE 10-BIT, 240 MSPS VIDEO DAC WITH TRI-LEVEL SYNC AND VIDEO (ITU-R.BT601) COMPLIANT FULL SCALE RANGE |
| THS8135EVM | 功能描述:視頻 IC 開發(fā)工具 Triple 10B 240MSPS RoHS:否 制造商:Texas Instruments 產(chǎn)品:Evaluation Boards 類型:YPbPr to RGBHV Converters 工具用于評估:LMH1251 工作電源電壓:5 V |
| THS8135PHP | 功能描述:數(shù)字化視頻/模擬轉(zhuǎn)換器集成電路 Triple 10B 240MSPS Video DAC RoHS:否 制造商:Texas Instruments 轉(zhuǎn)換器數(shù)量:3 輸出類型:Current 轉(zhuǎn)換速率:180 MSPs 分辨率:10 bit 接口類型:Parallel 電壓參考:Internal or External 積分非線性:- 2.5 LSB, 1.5 LSB 電源電壓-最大:3.6 V 電源電壓-最小:3 V 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝 / 箱體:HTQFP 封裝:Tray |
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